Publication List

桜井研究室論文リスト

The English version is here.

発表論文まとめ (Google Scholar)

論文誌のリスト [Link]

国際会議のリスト [Link]

2014

#2014002
H. Fuketa, K. Yoshioka, T. Yokota, W. Yukita, M. Koizumi, M. Sekino, T. Sekitani, M. Takamiya, T. Someya, and T. Sakurai, "Organic-Transistor-Based 2kV ESD-Tolerant Flexible Wet Sensor Sheet for Biomedical Applications with Wireless Power and Data Transmission Using 13.56MHz Magnetic Resonance," IEEE International Solid-State Circuits Conference (ISSCC), pp. 490-491, Feb. 2014.

#2014001
H. Fuketa, M. Nomura, M. Takamiya, and T. Sakurai, "Intermittent Resonant Clocking Enabling Power Reduction at Any Clock Frequency for Near/Sub-Threshold Logic Circuits," IEEE Journal of Solid-State Circuits, Vol.49, No.2, pp. 536-544, Feb. 2014.

2013

#2013016
X. Zhang, Y. Okuma, P. -H. Chen, K. Ishida, Y. Ryu, K. Watanabe, T. Sakurai, and M. Takamiya, "A 0.6-V Input 94% Peak Efficiency CCM/DCM Digital Buck Converter in 40-nm CMOS with Dual-Mode-Body-Biased Zero-Crossing Detector," IEEE Asian Solid-State Circuits Conference (A-SSCC), pp. 45-48, Nov. 2013.

#2013015
H. Fuketa, R. Takahashi, M. Takamiya, M. Nomura, H. Shinohara, and T. Sakurai, "Variation-aware Subthreshold Logic Circuit Design," IEEE International Conference on ASIC (ASICON), pp. 95-98, Oct. 2013. (Invited)

#2013014
K. Mori, Y. Okuma, X. Zhang, H. Fuketa, T. Sakurai, and M. Takamiya, "Analog-Assisted Digital Low Dropout Regulator (AAD-LDO) with 59% Faster Transient Response and 28% Ripple Reduction," International Conference on Solid State Devices and Materials (SSDM), pp. 888-889, Sep. 2013.

#2013013
H. Fuketa, R. Takahashi, M. Takamiya, M. Nomura, H. Shinohara, and T. Sakurai, "Increase of Crosstalk Noise Due to Imbalanced Threshold Voltage Between nMOS and pMOS in Subthreshold Logic Circuits," IEEE Journal of Solid-State Circuits, Vol. 48, No. 8, pp. 1986-1994, Aug. 2013.

#2013012
H. Fuketa, K. Ishida, T. Sekitani, M. Takamiya, T. Someya, and T. Sakurai, "Large-Area and Flexible Sensors with Organic Transistors," IEEE International Workshop on Advances in Sensors and Interfaces (IWASI), pp. 87-90, June 2013. (Invited)

#2013011
S. Iguchi, A. Saito, Y. Zheng, K. Watanabe, T. Sakurai, and M. Takamiya, "93% Power Reduction by Automatic Self Power Gating (ASPG) and Multistage Inverter for Negative Resistance (MINR) in 0.7V, 9.2uW, 39MHz Crystal Oscillator," IEEE Symposium on VLSI Circuits, pp. C142-C143, June 2013.

#2013010
M. Nomura, A. Muramatsu, H. Takeno, S. Hattori, D. Ogawa, M. Nasu, K. Hirairi, S. Kumashiro, S. Moriwaki, Y. Yamamoto, S. Miyano, Y. Hiraku, I. Hayashi, K. Yoshioka, A. Shikata, H. Ishikuro, M. Ahn, Y. Okuma, X. Zhang, Y. Ryu, K. Ishida, M. Takamiya, T. Kuroda, H. Shinohara, and T. Sakurai, "0.5V Image Processor with 563 GOPS/W SIMD and 32bit CPU Using High Voltage Clock Distribution (HVCD) and Adaptive Frequency Scaling (AFS) with 40nm CMOS," IEEE Symposium on VLSI Circuits, pp. C36-C37, June 2013.

#2013009
H. Fuketa, K. Hirairi, T.Yasufuku, M. Takamiya, M. Nomura, H. Shinohara, and T. Sakurai, "Minimizing Energy of Integer Unit by Higher Voltage Flip-Flop: VDDmin-Aware Dual Supply Voltage Technique," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 21, No. 6, pp. 1175-1179, June 2013.

#2013008
S. Iguchi, P. Yeon, H. Fuketa, K. Ishida, T. Sakurai, and M. Takamiya, "Zero Phase Difference Capacitance Control (ZPDCC) for Magnetically Resonant Wireless Power Transmission," IEEE Wireless Power Transfer Conference (WPTC), pp. 25-26, May. 2013.

#2013007
H. Fuketa, Y. Shinozuka, K. Ishida, M. Takamiya, T. Fujii, H. Shimizu, K. Kobayashi, T. Sato, and T. Sakurai, "Efficiency Increase in On-Chip Buck Converter by Introduction of High Permeability Material to Inductor on Interposer," International Conference on Ferrites (ICF), p. 75, Apr. 2013.

#2013006
Y. Shinozuka, H. Fuketa, K. Ishida, F. Furuta, K. Osada, K. Takeda, M. Takamiya, and T. Sakurai, "Reducing IR Drop in 3D Integration to Less Than 1/4 Using Buck Converter on Top Die (BCT) Scheme," IEEE International Symposium on Quality Electronic Design (ISQED), pp. 210-215, March 2013.

#2013005
H. Fuketa, M. Nomura, M. Takamiya, T. Sakurai, "Intermittent Resonant Clocking Enabling Power Reduction at any Clock Frequency for 0.37V 980kHz Near-Threshold Logic Circuits," IEEE International Solid-State Circuits Conference (ISSCC), pp. 436-437, Feb. 2013.

#2013004
H. Fuketa, K. Yoshioka, Y. Shinozuka, K. Ishida, T. Yokota, N. Matsuhisa, Y. Inoue, M. Sekino, T. Sekitani, M. Takamiya, T. Someya, T. Sakurai, "1um-Thickness 64-Channel Surface Electromyogram Measurement Sheet with 2V Organic Transistors for Prosthetic Hand Control," IEEE International Solid-State Circuits Conference (ISSCC), Feb. 2013.

#2013003
S. Iguchi, A. Saito, K. Honda, Y. Zheng, K. Watanabe, T. Sakurai, and M. Takamiya, "315MHz OOK Transceiver with 38-uW Receiver and 36-uW Transmitter in 40-nm CMOS," Asia-South Pacific Design Automation Conference (ASP-DAC), pp. 93-94, Jan. 2013.

#2013002
X. Zhang, P. -H. Chen, Y. Ryu, K. Ishida, Y. Okuma, K. Watanabe, T. Sakurai, and M. Takamiya, "A Low Voltage Buck DC-DC Converter Using On-Chip Gate Boost Technique in 40nm CMOS," Asia-South Pacific Design Automation Conference (ASP-DAC), pp. 109-110, Jan. 2013.

#2013001
K. Ishida, T.-C. Huang, K. Honda, Y. Shinozuka, H. Fuketa, T. Yokota, U. Zschieschang, H. Klauk, G. Tortissier, T. Sekitani, M. Takamiya, H. Toshiyoshi, T. Someya, and T. Sakurai, "Insole Pedometer With Piezoelectric Energy Harvester and 2V Organic Circuits," IEEE Journal of Solid-State Circuits, Vol.48, No.1, pp. 255-264, Jan. 2013.

2012

#2012013
X. Zhang, P. -H. Chen, Y. Ryu, K. Ishida, Y. Okuma, K. Watanabe, T. Sakurai, and M. Takamiya, "A 0.45-V Input On-Chip Gate Boosted (OGB) Buck Converter in 40-nm CMOS with More Than 90% Efficiency in Load Range from 2μW to 50μW," IEEE Symposium on VLSI Circuits, Hawaii, pp. 194-195, June 2012.
[Paper Link]

#2012012
A. Saito, K. Honda, Y. Zheng, S. Iguchi, K. Watanabe, T. Sakurai, and M. Takamiya, "An All 0.5V, 1Mbps, 315MHz OOK Transceiver with 38-μW Carrier-Frequency-Free Intermittent Sampling Receiver and 52-μW Class-F Transmitter in 40-nm CMOS," IEEE Symposium on VLSI Circuits, Hawaii, pp. 38-39, June 2012.
[Paper Link]

#2012011
N. Masunaga, K. Ishida, T. Sakurai, and M. Takamiya, "EMI Camera LSI(EMcam) with On-Chip Loop Antenna Matrix to Measure EMI Noise Spectrum and Distribution," IEICE Transaction on Electronics, E95-C, No.6, pp. 1059-1066, June 2012.
[Paper Link]

#2012010
L. Liu, T. Sakurai, and M. Takamiya, "A 315MHz Power-Gated Ultra Low Power Transceiver in 40nm CMOS for Wireless Sensor Network," IEICE Transaction on Electronics, E95-C, No.6, pp. 1035-1041, June 2012.
[Paper Link]

#2012009
H. Lim, K. Ishida, M. Takamiya, and T. Sakurai, "Positioning-Free Magnetically Resonant Wireless Power Transmission Board with Staggered Repeater Coil Array (SRCA)," IEEE MTT-S International Microwave Workshop Series on Innovative Wireless Power Transmission: Technologies, Systems, and Applications (IMWS-IWPT), Kyoto, pp. 93-96, May 2012.
[Paper Link]

#2012008
P. -H. Chen, K. Ishida, K. Ikeuchi, X. Zhang, K. Honda, Y. Okuma, Y. Ryu, M. Takamiya, and T. Sakurai, "Startup Techniques for 95 mV Step-Up Converter by Capacitor Pass-On Scheme and Vth-Tuned Oscillator With Fixed Charge Programming," IEEE Journal of Solid-State Circuits, Vol.47, No.5, pp. 1252-1260, May. 2012.
[Paper Link]

#2010007
延　平宇, 井口俊太, 陳　柏宏, 石田光一, 桜井貴康, 高宮　真, "受信電力40mWの磁気共鳴型無線電力送受信LSIの設計と評価," 電子情報通信学会総合大会，C-12-68，岡山，2012年3月.

#2012007
井口俊太, 齊藤　晶, 渡辺和紀, 桜井貴康, 高宮　真, "315MHz低出力F級パワーアンプにおけるデュアル電源電圧による高効率化," 電子情報通信学会総合大会，C-12-65，岡山，2012年3月.

#2012006
T. Yasufuku, K. Hirairi, Y. Pu, Y. -F. Zheng, R. Takahashi, M. Sasaki, H. Fuketa, A. Muramatsu, M. Nomura, F. Shinohara, M. Takamiya, and T. Sakurai, "24% Power Reduction by Post-Fabrication Dual Supply Voltage Control of 64 Voltage Domains in VDDmin Limited Ultra Low Voltage Logic Circuits," IEEE International Symposium on Quality Electronic Design (ISQED), Santa Clara, USA, pp. 586-591, March 2012.
[Paper Link]

#2012005
K. Hirairi, Y. Okuma, H. Fuketa, T. Yasufuku, M. Takamiya, M. Nomura, H. Shinohara, and T. Sakurai, "13% Power Reduction in 16b Integer Unit in 40nm CMOS by Adaptive Power Supply Voltage Control with Parity-Based Error Prediction and Detection (PEPD) and Fully Integrated Digital LDO," IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, USA, pp. 486-487, Feb. 2012.
[Paper Link]

#2012004
K. Ishida, T. -C. Huang, K. Honda, Y. Shinozuka, H. Fuketa, T. Yokota, U. Zschieschang, H. Klauk, G. Tortissier, T. Sekitani, M. Takamiya, H. Toshiyoshi, T. Someya, and T. Sakurai, "Insole Pedometer With Piezoelectric Energy Harvester and 2V Organic Digital and Analog Circuits," IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, USA, pp. 308-309, Feb. 2012.
[Paper Link]

#2012003
K. Ikeuchi, M. Takamiya, and T. Sakurai, "Through Silicon Capacitive Coupling (TSCC) Interface for 3D Stacked Dies," IEEE International Conference on 3D System Integration (3D IC), P-2-5, Osaka, Feb. 2012.
[Paper Link]

#2012002
P. -H. Chen, K. Ishida, X. Zhang, Y. Okuma, Y. Ryu, M. Takamiya, and T. Sakurai, "A 120-mV Input, Fully Integrated Dual-Mode Charge Pump in 65-nm CMOS for Thermoelectric Energy Harvester," Asia-South Pacific Design Automation Conference (ASP-DAC), Sydney, Australia, pp. 469-470, Jan. 2012. (Best Design Award in University LSI Design Contest を受賞)
[Paper Link]

#2012001
K. Ishida, T. -C. Huang, K. Honda, T. Sekitani, H. Nakajima, H. Maeda, M. Takamiya, T. Someya, and T. Sakurai, "A 100-V AC Energy Meter Integrating 20-V Organic CMOS Digital and Analog Circuits With a Floating Gate for Process Variation Compensation and a 100-V Organic pMOS Rectifier," IEEE Journal of Solid-State Circuits, Vol.47, No.1, pp. 301-309, Jan. 2012.
[Paper Link]

2011

#2011046
T. -C. Huang, K. Ishida, T. Sekitani, M. Takamiya, T. Someya, and T. Sakurai, "A Floating-Gate OTFT-Driven AMOLED Pixel Circuit for Variation and Degradation Compensation in Large-Sized Flexible Displays," International Display Workshop (IDW), Nagoya, Japan, pp. 1643-1646, Dec. 2011. (Invited)
[Paper Link]

#2011045
H. Fuketa, T. Yasufuku, S. Iida, M. Takamiya, M. Nomura, H. Shinohara, and T. Sakurai, "Device-Circuit Interactions in Extremely Low Voltage CMOS Designs," IEEE International Electron Devices Meeting (IEDM), Washington DC, USA, pp. 559-562, Dec. 2011. (Invited)
[Paper Link]

#2011044
T. Yokota, T. Sekitani, T. Tokuhara, U. Zschieschang, H. Klauk, T.-C. Huang, M. Takamiya, T. Sakurai, and T. Someya, "Sheet-type Organic Active Matrix Amplifier System Using Vth-Tunable, Pseudo-CMOS Circuits with Floating-gate Structure," IEEE International Electron Devices Meeting (IEDM), Washington DC, USA, pp. 335-338, Dec. 2011.

#2011043
P. -H. Chen, K. Ishida, X. Zhang, Y. Okuma, Y. Ryu, M. Takamiya, and T. Sakurai, "A 80-mV Input, Fast Startup Dual-Mode Boost Converter with Charge-Pumped Pulse Generator for Energy Harvesting," IEEE Asian Solid-State Circuits Conference (A-SSCC), Jeju, Korea, pp. 33-36, Nov. 2011.
[Paper Link]

#2011042
劉　良勝，大熊康介，石田光一，張　信，陳　柏宏，渡辺和紀，高宮　真，桜井貴康, "0.5V入力、効率96%のゲートブースト方式チャージポンプ回路の実証," 電気学会，電子回路研究会，電気学会研究会資料，ECT-11-69，pp. 11-14，長崎，2011年10月.

2011 #2011041
M. Daito, Y. Nakata, S. Sasaki, H. Gomyo, H. Kusamitsu, Y. Komoto, K. Iizuka, K. Ikeuchi, G. -S. Kim, M. Takamiya, and T. Sakurai, "Capacitively Coupled Non-Contact Probing Circuits for Membrane-Based Wafer-Level Simultaneous Testing," IEEE Journal of Solid-State Circuits, Vol.46, No.10, pp. 2386-2395, Oct. 2011.
[Paper Link]

#2011040
安福　正，飯田　智，更田裕司，平入孝二，野村昌弘，高宮　真，桜井貴康, "CMOS論理ゲートの最低可動電圧(VDDmin)の決定要因の分析," 電子情報通信学会ソサイエティ大会, C-12-17，札幌，2011年9月.

#2011039
延　平宇，陳　柏宏，石田光一，島本潤吉，桜井貴康，高宮　真, "磁気共鳴型無線電力伝送向け電力送受信回路の設計と実測," 電子情報通信学会ソサイエティ大会，B-1-11，札幌，2011年9月.

#2011038
林　睍根，石田光一，島本潤吉，桜井貴康，高宮　真, "磁気共鳴型無線電力伝送における位置ずれにロバストな送信コイルアレイと2倍径受信コイルの提案と実証," 電子情報通信学会ソサイエティ大会，B-1-10，札幌，2011年9月.

#2011037
A. Muramatsu, T. Yasufuku, M. Nomura, M. Takamiya, H. Shinohara, and T. Sakurai, "12% Power Reduction by Within-Functional-Block Fine-Grained Adaptive Dual Supply Voltage Control in Logic Circuits with 42 Voltage Domains," 37th European Solid-State Circuits Conference (ESSCIRC), Helsinki, Finland, pp. 191-194, Sep. 2011.
[Paper Link]

#2011036
更田裕司，平入孝二，安福　正，高宮　真，野村　昌弘，篠原尋史，桜井貴康, "低電圧動作可能なコンテンションレス・フリップフロップと2種の電源電圧による整数演算回路のエネルギー効率向上の実証," 電子情報通信学会，信学技報，ICD2011-63，pp. 127-132，富山，2011年8月.

#2011035
本田健太郎，池内克之，野村昌弘，高宮　真，桜井貴康, "自動選択電荷注入を用いたCMOSロジック回路の最低可動電圧(VDDmin)の低減," 電子情報通信学会，信学技報，ICD2011-62，pp. 121-126，富山，2011年8月.

#2011034
高宮　真，石田光一，更田裕司，野村昌弘，篠原尋史，桜井貴康, "エナジーハーベストを用いた無線センサノードに適用可能な0.5V極低電力回路技術," 電子情報通信学会，信学技報，ICD2011-56，pp. 87-92，富山，2011年8月. (Invited)

#2011033
K. Ishida, T. -C. Huang, T. Sekitani, M. Takamiya, T. Someya, and T. Sakurai, " Large-Area Flexible Electronics with Organic Transistors," IEEE International Midwest Symposium on Circuits and Systems, Seoul, Korea, pp. 1-4, Aug. 2011. (Invited)
[Paper Link]

#2011032
K. Honda, K. Ikeuchi, M. Nomura, M. Takamiya, and T. Sakurai, "Reduction of Minimum Operating Voltage (VDDmin) of CMOS Logic Circuits with Post-Fabrication Automatically Selective Charge Injection," International Symposium on Low Power Electronics and Design (ISLPED), Fukuoka, Japan, pp. 175-180, Aug. 2011.
[Paper Link]

#2011031
H. Fuketa, K. Hirairi, T. Yasufuku, M. Takamiya, M. Nomura, H. Shinohara, and T. Sakurai, "12.7-times Energy Efficiency Increase of 16-bit Integer Unit by Power Supply Voltage (VDD) Scaling from 1.2V to 310mV Enabled by Contention-less Flip-Flops (CLFF) and Separated VDD between Flip-Flops and Combinational Logics," International Symposium on Low Power Electronics and Design (ISLPED), Fukuoka, Japan, pp. 163-168, Aug. 2011.
[Paper Link]

#2011030
T. Yasufuku, S. Iida, H. Fuketa, K. Hirairi, M. Nomura, M. Takamiya, and T. Sakurai, " Investigation of Determinant Factors of Minimum Operating Voltage of Logic Gates in 65-nm CMOS," International Symposium on Low Power Electronics and Design (ISLPED), Fukuoka, Japan, pp. 21-26, Aug. 2011.
[Paper Link]

#2011029
石田光一，黄　琮靖，本田健太郎，関谷　毅，中島宏佳，前田博己，高宮　真，染谷隆夫，桜井貴康, "有機CMOS回路を用いた100V AC積算電力計," 電子情報通信学会，信学技報，ICD2011-25，pp. 57-62，広島，2011年7月.

#2011028
X. Zhang, Y. Pu, K. Ishida, Y. Ryu, Y. Okuma, P. -H. Chen, K. Watanabe, T. Sakurai, and M. Takamiya, "A Voltage-Reference-Free Pulse Density Modulation (VRF-PDM) 1-V Input Switched-Capacitor 1/2 Voltage Converter with Output Voltage Trimming by Hot Carrier Injection and Periodic Activation Scheme," IEEE Symposium on VLSI Circuits, Kyoto, pp. 280-281, June 2011.
[Paper Link]

#2011027
L. Liu, T. Sakurai, and M. Takamiya, "315MHz Energy-Efficient Injection-Locked OOK Transmitter and 8.4 uW Power-Gated Receiver Front-End for Wireless Ad Hoc Network in 40nm CMOS," IEEE Symposium on VLSI Circuits, Kyoto, pp. 164-165, June 2011.
[Paper Link]

#2011026
H. Fuketa, S. Iida, T. Yasufuku, M. Takamiya, M. Nomura, H. Shinohara, and T. Sakurai, "A Closed-Form Expression for Estimating Minimum Operating Voltage (VDDmin) of CMOS Logic Gates," ACM Design Automation Conference, San Diego, USA, pp. 984-989, June 2011.
[Paper Link]

#2011025
T. Yasufuku, Y. Nakamura, Z. Piao, M. Takamiya, and T. Sakurai, "Power Supply Voltage Dependence of Within-Die Delay Variation of Regular Manual Layout and Irregular Place-and-Route Layout," IEICE Transaction on Electronics, E94-C, No.6, pp. 1072-1075, June 2011.
[Paper Link]

#2011024
K. Ikeuchi, H. Kusamitsu, M. Daito, G. -S. Kim, M. Takamiya, and T. Sakurai, "1 Gb/s, 50um X 50um Pads on Board Wireless Connector Based on Track-and-Charge Scheme Allowing Contacted Signaling," IEICE Transaction on Electronics, E94-C, No.6, pp. 992-998, June 2011.
[Paper Link]

#2011023
L. Liu, T. Sakurai. and M. Takamiya, "0.6V Voltage Shifter and Clocked Comparator for Sampling Correlation-Based Impulse Radio UWB Receiver," IEICE Transaction on Electronics, E94-C, No.6, pp. 985-991, June 2011.
[Paper Link]

#2011022
X. Zhang, Y. Pu, K. Ishida, Y. Ryu, Y. Okuma, P. -H. Chen, T. Sakurai, and M. Takamiya, "A Variable Output Voltage Switched- Capacitor DC-DC Converter with Pulse Density and Width Modulation (PDWM) for 57% Ripple Reduction at Low Output Voltage," IEICE Transaction on Electronics, E94-C, No.6, pp. 953-959, June 2011.
[Paper Link]

#2011021
Y. Okuma, K. Ishida, Y. Ryu, X. Zhang, P. -H. Chen, K. Watanabe, M. Takamiya, and T. Sakurai, "0.5-V Input Digital Low-Dropout Regulator (LDO) with 98.7% Current Efficiency in 65nm CMOS," IEICE Transaction on Electronics, E94-C, No.6, pp. 938-944, June 2011.
[Paper Link]

#2011020
K. Ishida, T. Yasufuku, S. Miyamoto, H. Nakai, M. Takamiya, T. Sakurai, and K. Takeuchi, "1.8 V Low-Transient-Energy Adaptive Program-Voltage Generator Based on Boost Converter for 3D-Integrated NAND Flash SSD," IEEE Journal of Solid-State Circuits, Vol.46, No.6, pp. 1478-1487, June 2011.
[Paper Link]

#2011019
L. Liu, T. Sakurai, and M. Takamiya, "A Charge-Domain Auto- and Cross-Correlation Based Data Synchronization Scheme With Power-and Area-Efficient PLL for Impulse Radio UWB Receiver," IEEE Journal of Solid-State Circuits, Vol.46, No.6, pp. 1349-1359, June 2011.
[Paper Link]

#2011018
大熊康介，石田光一，劉　良勝，張　信，陳　柏宏，渡辺和紀，高宮　真，桜井貴康, "電流効率98.7% 0.5-V入力 65nm CMOS デジタルレギュレータ," 電子情報通信学会，集積回路研究専門委員会，第25回シリコンアナログRF研究会，講演番号3，北九州，2011年5月.

#2011017
本田健太郎，石田光一，黄　琮靖，関谷　剛，中島宏佳，前田博巳，高宮　真，染谷隆夫，桜井貴康, "100V AC積算電力計向けに100V/20Vの有機デジタル・アナログ回路を混載したシステム・オン・フィルムの実証," 電子情報通信学会，LSIとシステムのワークショップ，ポスターセッション学生部門01，pp. 187-189，北九州，2011 年5月. (IEEE SSCS Kansai Chapter Academic Research Awardを受賞）

#2011016
T. -C. Huang, K. Ishida, T. Sekitani, M. Takamiya, T. Someya, and T. Sakurai, "A Floating-Gate OTFT-Driven AMOLED Pixel Circuit for Variation and Degradation Compensation in Large-Sized Flexible Displays," Society for Information Display (SID) International Symposium, Los Angeles, USA, pp. 149-152, May 2011.
[Paper Link]

#2011015
Y. Pu, X. Zhang, K. Ikeuchi, A. Muramatsu, A. Kawasumi, M. Takamiya, M. Nomura, H. Shinohara, and T. Sakurai, "Post-Silicon Clock Deskew Employing Hot-Carrier Injection Trimming With On-Chip Skew Monitoring and Auto-Stressing Scheme for Sub/Near Threshold Digital Circuits," IEEE Transactions on Circuits and Systems-II, Vol. 58, No. 5, pp. 294-298, May 2011.
[Paper Link]

#2011014
T. Yokota, T. Nakagawa, T. Sekitani, Y. Noguchi, K. Fukuda, U. Zschieschang, H. Klauk, K. Takeuchi, M. Takamiya, T. Sakurai, and T. Someya, "Control of Threshold Voltage in Low-Voltage Organic Complementary Inverter Circuits with Floating Gate Structures," Applied. Physics. Letters, 98, 193302, May 2011.

#2011013
P. -H. Chen, K. Ishida, X. Zhang, Y. Okuma, Y. Ryu, M. Takamiya, and T. Sakurai, "0.18-V Input Charge Pump with Forward Body Bias to Startup Boost Converter for Energy Harvesting Applications," IEICE Transaction on Electronics, E94-C, No.4, pp.598-604, Apr. 2011.
[Paper Link]

#2011012
高宮　真，安福　正，更田裕司，石田光一，桜井貴康, "極低電圧動作による超低電力回路設計技術," 2011年春季第58回応用物理学関係連合講演会，25p-KC-5，神奈川，2011年3月. (Invited)

#2011011
P.-H. Chen, K. Ishida, X. Zhang, Y. Okuma, Y. Ryu, M. Takamiya, and T. Sakurai, "0.18-V Input Charge Pump with Forward Body Biasing," 電子情報通信学会総合大会，C-12-58，東京，2011年3月.

#2011010
鄭　雲飛，斉藤　晶，渡辺和紀，高宮　真，桜井貴康, "0.35V, 4.1uW, 39MHz, 40nm CMOS水晶発振回路の実証," 電子情報通信学会総合大会，C-12-50，東京，2011年3月.

#2011009
片岡直之，安福　正，更田裕司，平入孝二，黄　琮靖，村松　篤，野村昌弘，高宮　真，篠原尋史，桜井貴康, "最低可動電圧(VDDmin)の低いフリップフロップ回路トポロジーの探索," 電子情報通信学会総合大会，C-12-33，東京，2011年3月.

#2011008
安福　正，中村安見，朴　哲，高宮　真，桜井貴康, "低電源電圧領域におけるチップ内遅延時間ばらつきの測定," 電子情報通信学会総合大会，C-12-31，東京，2011年3月.

#2011007
本田健太郎，石田光一，黄　琮靖，関谷　毅，高宮　真，染谷隆夫，桜井貴康, "20V有機CMOSオペアンプにおけるフローティングゲートを利用したプロセスばらつき補正技術の提案と実証," 電子情報通信学会総合大会，C-12-30，東京，2011年3月.

#2011006
林　睍根，島本潤吉，桜井貴康，高宮　真, "磁気共鳴型無線電力伝送における位置ずれにロバストな送信コイルアレーのオープン・ショート制御方式の提案," 電子情報通信学会総合大会，B-1-6，東京，2011年3月.

#2011005
K. Ishida, T. -C. Huang, K. Honda, T. Sekitani, H. Nakajima, H. Maeda, M. Takamiya, T. Someya, and T. Sakurai, "100-V AC Power Meter System-on-a-Film (SoF) Integrating 20-V Organic CMOS Digital and Analog Circuits with Floating Gate for Process Variation Compensation and 100-V Organic PMOS Rectifier," IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, USA, pp. 218-219, Feb. 2011.
[Paper Link]

#2011004
P. -H. Chen, K. Ishida, K. Ikeuchi, X. Zhang, K. Honda, Y. Okuma, Y. Ryu, M. Takamiya, and T. Sakurai, "A 95mV-Startup Step-up Converter with VTH-Tuned Oscillator by Fixed-Charge Programming and Capacitor Pass-On Scheme," IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, USA, pp. 216-217, Feb. 2011.
[Paper Link]

#2011003
K. Johguchi, T. Hatanaka, K. Ishida, T. Yasufuku, T. Takamiya, T. Sakurai, and K. Takeuchi, "Through-Silicon Via Design for a 3-D Solid-State Drive System With Boost Converter in a Package," IEEE Transaction on Components, Packaging and Manufacturing Technology, Vol.1, No.2, pp. 269-277, Feb. 2011.

#2011002
X. Zhang, K. Ishida, M. Takamiya, and T. Sakurai, "An On-Chip Characterizing System for Within-Die Delay Variation Measurement of Individual Standard Cells in 65-nm CMOS," Asia-South Pacific Design Automation Conference (ASP-DAC), Yokohama, Japan, pp. 109-110, Jan. 2011.
[Paper Link]

#2011001
K. Ishida, N. Masunaga, R. Takahashi, T. Sekitani, S. Shino, U. Zschieschang, H. Klauk, M. Takamiya, T. Someya, and T. Sakurai, "User Customizable Logic Paper (UCLP) with Sea-of Transmission-Gates (SOTG) of 2-V Organic CMOS and Ink-Jet Printed Interconnects," IEEE Journal of Solid-State Circuits, Vol.46, No.1, pp. 285-292, Jan. 2011.
[Paper Link]

2010

#2010001
T. Yasufuku, T. Niiyama, Z. Piao, K. Ishida, M. Murakata, M. Takamiya, and T. Sakurai, "Difficulty of Power Supply Voltage Scaling in Large Scale Subthreshold Logic Circuits ," IEICE Transaction on Electronics, E93-C, No.3, pp.332-339, March 2010
[Paper Link]

#2010002
Yasufuku, K. Ishida, S. Miyamoto, H. Nakai, M. Takamiya, and T. Sakurai, "Inductor and TSV Design of 20-V Boost Converter for Low Power 3D Solid State Drive with NAND Flash Memories ," IEICE Transaction on Electronics, E93-C, No.3, pp.317-323, March 2010

#2010003
K. Ishida, N. Masunaga, Z. Zhou, T. Yasufuku, T. Sekitani, U. Zschieschang, H. Klauk, M. Takamiya, T. Someya, and T. Sakurai, "Stretchable EMI Measurement Sheet With 8 X 8 Coil Array, 2 V Organic CMOS Decoder, and 0.18 um Silicon CMOS LSIs for Electric and Magnetic Field Detection," IEEE Journal of Solid-State Circuits, Vol. 45, No. 1, pp. 249-259, Jan. 2010
[Paper Link]

#2010004
M. Takamiya, K. Onizuka, K. Ishida, and T. Sakurai, "DC-DC Converter Technologies for On-Chip Distributed Power Supply Systems - 3D Stacking and Hybrid Operation," Springer, pp. 221-247, 2010

#2010005
Y. Kato, T. Sekitani, Y. Noguchi, T. Yokota, M. Takamiya, T. Sakurai and T, Someya, "Large-Area Flexible Ultrasonic Imaging System With an Organic Transistor Active Matrix," IEEE Transactions on Electron Devices, Vol. 57, No. 5, pp. 995 - 1002, 2010
[Paper Link]

#2010006
L. Liu, Z. Zhou, T. Sakurai, and M. Takamiya, "A 1.76mW, 100Mbps Impulse Radio UWB Receiver with Multiple Sampling Correlators Eliminating Need for Phase Synchronization in 65-nm CMOS," IEICE Transaction on Electronics, E93-C, No.6, pp. 796-802, 2010
[Paper Link]

#2010007
石田光一，増永直樹，高橋亮，関谷毅，志野成樹，ツィーシャング　ウテ，クラーク　ハーゲン，高宮真，染谷隆夫，桜井貴康, "2V有機CMOS回路とインクジェット印刷配線を用いたユーザー・カスタマイザブル・ロジック・ペーパー," 電子情報通信学会，信学技報, ICD2010-35，pp. 115-119, 2010

#2010008
畑中輝義，石田光一，安福正，宮本晋示，中井弘人，高宮真，桜井貴康，竹内健, "NANDチャネル数検出回路・インテリジェント書き込み電圧発生回路を備えた、60%高速・4.2Gbps・24チャネル、3次元ソリッド・ステート・ドライブ（SSD）," 電子情報通信学会, 信学技報, ICD2010-55，pp. 89-94, 2010

#2010009
高宮真，篠原尋史，桜井貴康, "極低電圧動作による低エネルギーLSI," 電子情報通信学会誌, 93巻，11号, pp. 943-94, 2010

#2010010
L. Liu, T. Sakurai, and M. Takamiya, "A Charge-Domain Auto- and Cross-Correlation Based IR-UWB Receiver with Power- and Area-efficient PLL for 62.5ps Step Data Synchronization in 65nm CMOS," 電子情報通信学会，信学技報, ICD2010-120, pp. 125-129, 2010

#2010011
Y. Pu, X. Zhang, J. Huang, A. Muramatsu, M. Nomura, K. Hirairi, H. Takata, T. Sakurabayashi, S. Miyano, M. Takamiya, and T. Sakurai, "Misleading Energy and Performance Claims in Sub/Near Threshold Digital Systems," 電子情報通信学会，信学技報, ICD2010-122, pp. 135-140, 2010

#2010012
X. Zhang, Y. Pu, K. Ishida, Y. Ryu, Y. Okuma, P. Chen, K. Watanabe, T. Sakurai, and M. Takamiya, "A 1-V Input, 0.2-V to 0.47-V Output Switched-Capacitor DC-DC Converter with Pulse Density and Width Modulation (PDWM) for 57% Ripple Reduction," 電子情報通信学会，信学技報, ICD2010-127, pp. 163-167, 2010

#2010013
陳柏宏，石田光一，張信，大熊康介，劉良勝，高宮真，桜井貴康, "起動回路に向けた基板順バイアス型 0.18-V 入力チャージポンプ回路," 電子情報通信学会，信学技報, ICD2010-128, pp. 169-173, 2010

#2010014
K. Ishida, N. Masunaga, R. Takahashi, T. Sekitani, S. Shino, U. Zschieschang, H. Klauk, M. Takamiya, T. Someya, and T. Sakurai, "User Customizable Logic Paper (UCLP) with Sea-of Transmission-Gates (SOTG) of 2-V Organic CMOS and Ink-Jet Printed Interconnects," IEEE Journal of Solid-State Circuits, Vol.46, No.1, pp. 285-292, 2011
[Paper Link]

#2010015
L. Liu, T. Sakurai, and M. Takamiya, "A Charge-Domain Auto- and Cross-Correlation Based IR-UWB Receiver with Power- and Area-efficient PLL for 62.5ps Step Data Synchronization in 65nm CMOS," IEEE Symposium on VLSI Circuits, Hawaii, pp. 27-28, 2010
[Paper Link]

#2010016
H. Ishizaki, T. Araki, S. Takahashi, J. Ryu, S. Uchida, N. Yoshida, M. Takamiya and M. Mizuno, "FDM-based Wireless Source Synchronous 15-Mbps TRx with PLL-less Receiver and 1-mm On-chip Integrated Antenna for 1.25-cm Touch-and-Proceed Communication," IEEE Symposium on VLSI Circuits, Hawaii, pp. 73-74, 2010

#2010017
T. Hatanaka, K. Ishida, T. Yasufuku, S. Miyamoto, H. Nakai, M. Takamiya, T. Sakurai and K. Takeuchi, "A 60% Higher Write Speed, 4.2Gbps, 24-Channel 3D-Solid State Drive (SSD) with NAND Flash Channel Number Detector and Intelligent Program-Voltage Booster," IEEE Symposium on VLSI Circuits, Hawaii, pp. 233-234, 2010

#2010018
P.-H. Chen, K. Ishida, X. Zhang, Y. Okuma, Y. Ryu, M. Takamiya, and T. Sakurai, "0.18-V Input Charge Pump with Forward Body Biasing in Startup Circuit using 65nm CMOS," IEEE Custom Integrated Circuits Conference (CICC), San Jose, USA, pp. 239-242, 2010
[Paper Link]

#2010019
Y. Okuma, K. Ishida, Y. Ryu, P.-H. Chen, K. Watanabe, M. Takamiya, and T. Sakurai, "0.5-V Input Digital LDO with 98.7% Current Efficiency and 2.7-μA Quiescent Current in 65nm CMOS," IEEE Custom Integrated Circuits Conference (CICC), San Jose, USA, pp. 323-326, 2010
[Paper Link]

#2010020
N. Masunaga, K. Ishida, M. Takamiya, and T. Sakurai, "EMI Camera LSI (EMcam) with 12 x 4 On-Chip Loop Antenna Matrix in 65-nm CMOS to Measure EMI Noise Distribution with 60-μm Spatial Precision," IEEE Custom Integrated Circuits Conference (CICC), San Jose, USA, pp. 449-452, 2010
[Paper Link]

#2010021
T. Sekitani, K. Ishida, N. Masunaga, R. Takahashi, S. Shino, U. Zschieschang, H. Klauk, M. Takamiya, T. Sakurai, and T. Someya, "Organic CMOS Logic Papers with In-Field User Customizability," 2010 International Conference on Solid State Devices and Materials (SSDM), 2010

#2010022
M. Takamiya, K. Ishida, T. Sekitani, T. Someya, and T. Sakurai, "Design of Large Area Electronics with Organic Transistors," IEEE International Conference on Computer-Aided Design (ICCAD), San Jose, USA, pp. 500-503, 2010
[Paper Link]

#2010023
Y. Pu, X. Zhang, J. Huang, A. Muramatsu, M. Nomura, K. Hirairi, H. Takata, T. Sakurabayashi, S. Miyano, M. Takamiya, and T. Sakurai, "Misleading Energy and Performance Claims in Sub/Near Threshold Digital Systems," IEEE International Conference on Computer-Aided Design (ICCAD), San Jose, USA, pp. 625-631, 2010
[Paper Link]

#2010024
X. Zhang, Y. Pu, K. Ishida, Y. Ryu, Y. Okuma, P.-H. Chen, K. Watanabe, T. Sakurai, and M. Takamiya, "A 1-V Input, 0.2-V to 0.47-V Output Switched-Capacitor DC-DC Converter with Pulse Density and Width Modulation (PDWM) for 57% Ripple Reduction," IEEE Asian Solid-State Circuits Conference (A-SSCC), Beijing, China, pp. 61-64, 2010
[Paper Link]

#2010025
L. Liu, T. Sakurai, and M. Takamiya, "0.6V Voltage Doubler and Clocked Comparator for Correlation-based Impulse Radio UWB Receiver in 65nm CMOS," IEEE Asian Solid-State Circuits Conference (A-SSCC), Beijing, China, pp. 301-304, 2010
[Paper Link]

#2010026
K. Ishida, K. Takemura, K. Baba, M. Takamiya, and T. Sakurai, "3D Stacked Buck Converter with 15um Thick Spiral Inductor on Silicon Interposer for Fine-Grain Power-Supply Voltage Control in SiP’s," IEEE International Conference on 3D System Integration (3D IC), Munich, Germany, 2010

#2010027
G.-S. Kim, K. Ikeuchi, M. Daito, M. Takamiya, and T. Sakurai, "A High-Speed, Low-Power Capacitive-Coupling Transceiver for Wireless Wafer-Level Testing Systems," IEEE International Conference on 3D System Integration (3D IC), Munich, Germany, 2010

#2010028
M. Takamiya, K. Ishida, T. Sekitani, U. Zschieschang, H. Klauk, T. Someya, and T. Sakurai, "Large Area Electronics with Organic Transistors and Novel Interconnects: EMI Measurement Sheet with Stretchable Interconnects and User Customizable Logic Paper (UCLP) with Ink-Jet Printed Interconnects," International Display Workshop (IDW), Fukuoka, Japan, pp. 1577-1580, 2010
[Paper Link]

#2010029
X. Zhang, K. Ishida, M. Takamiya, and T. Sakurai, "An On-Chip Characterizing System for Within-Die Delay Variation Measurement of Individual Standard Cells in 65-nm CMOS," Asia-South Pacific Design Automation Conference (ASP-DAC), Yokohama, Japan, pp. 109-110, 2010

#2010030
P. -H. Chen, K. Ishida, K. Ikeuchi, X. Zhang, K. Honda, Y. Okuma, Y. Ryu, M. Takamiya, and T. Sakurai, "A 95mV-Startup Step-up Converter with VTH-Tuned Oscillator by Fixed-Charge Programming and Capacitor Pass-On Scheme," IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, USA, pp. 216-217, 2010

#2010031
K. Ishida, T. -C. Huang, K. Honda, T. Sekitani, H. Nakajima, H. Maeda, M. Takamiya, T. Someya, and T. Sakurai, "100-V AC Power Meter System-on-a-Film (SoF) Integrating 20-V Organic CMOS Digital and Analog Circuits with Floating Gate for Process Variation Compensation and 100-V Organic PMOS Rectifier," IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, USA, pp. 218-219, 2010

#2010032
桜井貴康, "低消費電力集積回路技術の展望," 次世代リソグラフワークショップ予稿集, pp.3-4, 2010

#2010033
平田貴士，島本潤吉，荒木貴弘，桜井貴康，高宮真, "磁気共鳴方式の無線電力伝送用コイルを無線通信へ応用した「磁気共鳴通信」の提案," 電子情報通信学会ソサイエティ大会, B-1-1, 2010

#2010034
高橋亮，更田裕司，高宮真，桜井貴康, "電源ノイズと配線間クロストークノイズの電源電圧依存性に関する一考察," 電子情報通信学会ソサイエティ大会, C-12-18, 2010

#2010035
林睍根，島本潤吉，桜井貴康，高宮真, "磁気共鳴型無線電力伝送における位置ずれにロバストな送信コイルアレーのオープン・ショート制御方式の提案," 電子情報通信学会総合大会, B-1-6，東京, 2010

#2010036
本田健太郎，石田光一，黄琮靖，関谷毅，高宮真，染谷隆夫，桜井貴康, "20V有機CMOSオペアンプにおけるフローティングゲートを利用したプロセスばらつき補正技術の提案と実証," 電子情報通信学会総合大会, C-12-30, 2010

#2010037
安福正，中村安見，朴哲，高宮真，桜井貴康, "低電源電圧領域におけるチップ内遅延時間ばらつきの測定," 電子情報通信学会総合大会, C-12-31, 2011

#2010038
片岡直之，安福正，更田裕司，平入孝二，黄琮靖，村松篤，野村昌弘，高宮真，篠原尋史，桜井貴康, "最低可動電圧(VDDmin)の低いフリップフロップ回路トポロジーの探索," 電子情報通信学会総合大会, C-12-33, 2011

#2010039
鄭雲飛，斉藤晶，渡辺和紀，高宮真，桜井貴康, "0.35V, 4.1uW, 39MHz, 40nm CMOS水晶発振回路の実証," 電子情報通信学会総合大会, C-12-50, 2011

#2010040
高宮真，安福正，更田裕司，石田光一，桜井貴康, "極低電圧動作による超低電力回路設計技術," 2011年春季第58回応用物理学関係連合講演会, 25p-KC-5，神奈川, 2011

#2010041
P.-H. Chen, K. Ishida, X. Zhang, Y. Okuma, Y. Ryu, M. Takamiya, and T. Sakurai, "0.18-V Input Charge Pump with Forward Body Biasing," 電子情報通信学会総合大会, C-12-58, 2011

2009

#2009001
L. Liu, T. Sakurai and M. Takamiya,"A 1.28mW 100Mb/s Impulse UWB Receiver with Charge-Domain Correlator and Embedded Sliding Scheme for Data Synchronization," Symp. on VLSI Circuits, Paper#14-3, June 2009
#2009002
K.Ishida, N.Masunaga, Z.Zhou, T.Yasufuku T.Sekitani, U.Zschieschang, H.Klauk, M.Takamiya, T.Someya, and T.Sakurai, "A Stretchable EMI Measurement Sheet with 8 x 8 Coil Array, 2V Organic CMOS Decoder and -70dBm EMI Detection Circuits in 0.18um CMOS," ISSCC 2009 digest of technical papers, paper#28.3, pp.472-473, Feb.2009
#2009003
T.Sakurai, "Wireless Power," ISSCC 2009 digest of technical papers, p.519, Feb.2009
#2009004
T.Sakurai, "Variability and Ultra-low Voltage Logic Design," ISSCC 2009 digest of technical papers, Forum 4 Ultra-Low-Voltage Circuit Design, p.507, Feb.2009
#2009005
K.Ishida, T.Yasufuku, S.Miyamoto, H.Nakai, M.Takamiya, T.Sakurai, K.Takeuchi, "A 1.8V 30nJ Adaptive Program-Voltage (20V) Generator for 3D-Integrated NAND Flash SSD," ISSCC 2009 digest of thecnical papers, paper#13.2, pp.238-241, Feb.2009
#2009006
Y.Sugimori, Y.Kohama, M.Saito, Y.Yoshida, N.Miura, H.Ishikuro, T.Sakurai, T.Kuroda, "A 2Gb/s 15pJ/b/chip Inductive-Coupling Programmable Bus for NAND Flash Memory Stacking," ISSCC 2009 digest of thecnical papers,paper#13.5, pp.244-245, Feb.2009
#2009007
T.Hatanaka, R.Yajima, S.Sakaki, M.Takahashi, Qiu-Hong Li, T.Horiuchi, S.Wang, Kwi-Young Yun, M.Takamiya, T.Sakurai, "Highly Scalable Fe(Ferroelectronics)-NAND Cell with MFIS (Metal-Ferroelectrric-Insulatore-Semiconductor) Structure for Sub-10 nm tera-Bit Capacity NAND Flash Memories," Proceedings of International Symposium on Secure-Life Electronics, pp.357-359, Jan.2009
#2009008
Y.Nakamura, D.Levacq, L.Xiao, T.Minakawa, T.Niiyama, M.Takamiya, T.Sakurai,"1/5 Power Reduction by Post-Fabrication Tuning with Fine-Grained Body Biasing," Proceedings of International Symposium on Secure-Life Electronics, pp.403-407, Jan.2009
#2009009
M.Takamiya, L.Liu, T.Sekitani, Y.Noguchi, S.Nakano, K.Zaitsu, T.Kuroda, T.Someya, T.Sakurai, "Ultra Low Power Inorgranic-Organic Hybrid Circuits and Digital-Analog Mixed Circuits for Secure Life," Proceedings of International Symposium on Secure-Life Electronics, pp.415-420, Jan.2009
#2009010
L.Liu, Y.Miyamoto, Z.Zhou, K.Sakaida, J.Ryu, K.Ishida, M.Takamiya, and T.Sakurai ,"A 100Mbps, 0.19mW Asynchronous Threshold Detector with DC Power-Free Pulse Discrimination for Impulse UWB Receiver," Asia-South Pacific Design Automation Conference (ASP-DAC) ,Jan.2009
#2009011
坂井田耕輔, 高宮　真, 桜井貴康 ,"共振クロックにおける低速テストと低電力化を両立させるクロック分配回路の提案," 電子情報通信学会総合大会 ,愛媛県松山市,2009年3月18日
#2009012
石田光一, 安福　正, 高宮　真, 竹内　健, 桜井貴康,"NAND型フラッシュSSD向け20Vブーストコンバータの制御方式(その1)," 電子情報通信学会総合大会, 一般講演,2009年3月
#2009013
安福　正, 石田光一, 高宮　真, 竹内　健, 桜井貴康 ,"NAND型フラッシュSSD向け20Vブーストコンバータの制御方式(その2)," 電子情報通信学会総合大会 ,愛媛県松山市, 2009年3月18日
#2009014
池内克之, 稲垣賢一, 草光秀樹, 伊東利育, 高宮　真, 桜井貴康 ,"非接触コネクタ向け500Mbps容量結合通信用受信回路の検討," 電子情報通信学会総合大会 ,愛媛県松山市, 2009年3月18日
#2009015
増永直樹, 石田光一, 周　志偉, 安福　正, 関谷　毅, 高宮　真, 染谷隆夫, 桜井貴康 ,"伸縮可能なEMI測定シートにおけるEMI測定用LSIの設計と評価," 電子情報通信学会総合大会 ,愛媛県松山市,2009年3月
#2009016
桜井貴康, "VLSI設計研究での国際産学連携,CCR12年の軌跡," Mar-08.2009
#2009017
桜井貴康, "最先端技術におけるデバイスばらつきと統計的回路特性," システムデザインフォーラム2009,パシフィコ横浜アネックスホール ,Jan-09, 2009
#2009018
桜井貴康, "巻頭対談　半導体の将来と低消費電力化の必要性," Vol.23,,Feb-09, 2009
#2009019
Y.Sugimori, Y.Kohama, M.Saito, Y.Yoshida, N.Miura, H.Ishikuro, T.Sakurai, T.Kuroda, "A 2Gb/s 15pJ/b/chip Inductive-Coupling Programmable Bus for NAND Flash Memory Stacking," ISSCC'09, paper#13.5, pp.244-245, Feb.2009
#2009020
K. Ishida, T. Yasufuku, S. Miyamoto, H. Nakai, M. Takamiya, T.Sakurai, K. Takeuchi, "A 1.8V 30nJ Adaptive Program-Voltage (20V) Generator for 3D-Integrated NAND Flash SSD," ISSCC'09, paper#13.2, pp.238-241, Feb.2009
#2009021
K. Ishida, N. Masunaga, Z. Zhou, T. Yasufuku, T. Sekitani, U.Zschieschang, H. Klauk, M. Takamiya, T. Someya, and T. Sakurai, "A Stretchable EMI Measurement Sheet with 8 x 8 Coil Array, 2V Organic CMOS Decoder, and -70dBm EMI Detection Circuits in 0.18um CMOS," ISSCC'09, paper#28.3, pp.472-473, Feb.2009
#2009022
T. Sakurai, "Variability and Ultra-low Voltage Logic Design," ISSCC'09, Forum 4: Ultra-Low-Voltage Circuit Design, p.507, Feb. 2009
#2009023
T.Sakurai, "Wireless Power," ISSCC'09, Special Evening session 7: Next Generation Energy Scavenging Systems, p.519, Feb. 2009
#2009024
N. Miura, Y. Kohama, Y. Sugimori, H. Ishikuro, T. Sakurai, and T. Kuroda, "A High-Speed Inductive-Coupling Link with Burst Transmission," IEEE Journal of Solid-State Circuits (JSSC), vol.44, no.3, pp.947-955, Mar. 2009
#2009025
G.-S. Kim, M. Takamiya, and T. Sakurai, "A 25-mV-Sensitivity 2-Gb/s Optimum-Logic-Threshold Capacitive-Coupling Receiver for Wireless Wafer Probing Systems," IEEE Transactions on Circuits and Systems-II: Express Briefs, Vol. 56, No. 9, pp. 709 - 713, Sep. 2009
#2009026
Takao Someya, Tsuyoshi Sekitani, Makoto Takamiya, Takayasu Sakurai, Ute Zschieschang and Hagen Klauk, "Printed organic transistors: Toward ambient electronics," Plenary talk, IEDM, Dec. 2009
#2009027
桜井貴康, 甲斐康司, 藤島実, "2020年の将来像 2020年の半導体-アプリケーション多様化への挑戦," 半導体技術年間2010 デバイス/プロセス編, pp.11-20, 日経BP社, Nov. 2009
#2009028
桜井貴康, "ロジック回路設計から見たトランジスタのバラつきと極低電圧ロジック," 半導体技術年間2010 デバイス/プロセス編, pp.87-94, 日経BP社, Nov. 2009
#2009029
L. Liu, M. Takamiya, T. Sekitani, Y. Noguchi, S. Nakano, K. Zaitsu, T. Kuroda, T. Someya, and T. Sakurai, "A 107-pJ/bit 100-kb/s 0.18-um Capacitive-Coupling Transceiver With Data Edge Signaling and DC Power-Free Pulse Detector for Printable Communication Sheet," IEEE Transactions on Circuits and Systems-I: Regular Papers, Vol. 56, No. 11, pp. 2511 - 2518, Nov. 2009
#2009030
高宮　真, 関谷　毅, 染谷隆夫, 桜井貴康, "ワイヤレス電力伝送・通信シート," 日本磁気学会会報「まぐね」, Vol. 4, No. 9, pp.435-440, Sep. 2009
#2009031
Sanghoon Hwang, Hyunsik Im, Minkyu Song, Koichi Ishida, Toshiro Hiramoto, and Takayasu Sakurai, "Velocity Saturation Effects in a Short Channel Si- MOSFET and its Small Signal Characteristics," Journal of the Korean Physical Society, Vol.55, No.2, pp.581-584, Aug. 2009
#2009032
Y. Nakamura, M. Takamiya, and T. Sakurai, "An On-Chip Noise Canceller with High Voltage Supply Lines for Nanosecond-Range Power Supply Noise," IEICE Transaction on Electronics, E92-C, No.4, pp.468-472, Apr. 2009
#2009033
L. Liu, Y. Miyamoto, Z. Zhou, K. Sakaida, J. Ryu, K. Ishida, M. Takamiya, and T. Sakurai, "100Mbps, 4.1pJ/bit Threshold Detection-Based Impulse Radio UWB Transceiver in 90nm CMOS," IEICE Transaction on Electronics, E92-C, No.6, pp.769-776, Jun. 2009
#2009034
T. Sekitani, K. Zaitsu, Y. Noguchi, K. Ishibe, M. Takamiya, T. Sakurai, and T. Someya, "Printed Nonvolatile Memory for a Sheet-Type Communication System," IEEE Transactions on Electron Devices, Vol. 56, No. 5, pp. 1027 - 1035, May 2009
#2009035
桜井貴康, 黒田忠広, 道関隆国, "CMOS LSI低電力回路技術の先駆的開発と実用化," 電子情報通信学会誌, Vol.92, N0.7, pp.506-507, Jul. 2009
#2009036
M. Daito, Y. Nakata, S. Sasaki, H. Gomyo, H. Kusamitsu, Y. Komoto, K. Iizuka, K. Ikeuchi, G. Kim, M. Takamiya, and T. Sakurai, "Capacitively Coupled Non-Contact Probing Circuits for Membrane-Based Wafer-Level Simultaneous Testing," IEEE International Solid-State Circuits Conference (ISSCC), pp. 144-145, 2009
#2009037
T. Sekitani, T. Yokota, U. Zschieschang, H. Klauk, S. Bauer, K. Takeuchi, M. Takamiya, T. Sakurai, and T. Someya, "Organic Nonvolatile Memory Transistors for Flexible Sensor Arrays," Science, Vol. 326, pp.1516-1519, 2009
#2009038
T. Someya, T. Sekitani, M. Takamiya, T. Sakurai, U. Zschieschang, and H. Klauk, "Printed Organic Transistors: Toward Ambient Electronics," IEEE International Electron Devices Meeting (IEDM), pp. 9-14, 2009
#2009039
Makoto Suzuki, Takuya Saraya, Ken Shimizu, Takayasu Sakurai, and Toshiro Hiramoto, "Improvement of Static Noise Margin in SRAM by Post-Fabrication Self-Convergence Technique," International Semiconductor Device Research Symposium (ISDRS), TP7-03, 2009
#2009040
G.-S. Kim, M. Takamiya, and T. Sakurai, "A Capacitive Coupling Interface with High Sensitivity for Wireless Wafer Testing," IEEE International Conference on 3D System Integration (3D IC), 2009
#2009041
T. Yasufuku, K. Ishida, S. Miyamoto, H. Nakai, M. Takamiya, T. Sakurai, and K. Takeuchi, "Effect of Resistance of TSV’s on Performance of Boost Converter for Low Power 3D SSD with NAND Flash Memories," IEEE International Conference on 3D System Integration (3D IC) , 2009
#2009042
K. Ikeuchi, K. Sakaida, K. Ishida, T. Sakurai, and M. Takamiya, "Switched Resonant Clocking (SRC) Scheme Enabling Dynamic Frequency Scaling and Low-Speed Test," IEEE Custom Integrated Circuits Conference (CICC), pp. 33-36, 2009
#2009043
T. Yasufuku, K. Ishida, S. Miyamoto, H. Nakai, M. Takamiya, T. Sakurai, and K. Takeuchi, "Inductor Design of 20-V Boost Converter for Low Power 3D Solid State Drive with NAND Flash Memories," International Symposium on Low Power Electronics and Design (ISLPED), pp. 87-91, 2009
#2009044
N. Masunaga, K. Ishida, Z. Zhou, T. Yasufuku, T. Sekitani, M. Takamiya, T. Someya, and T. Sakurai, "A Flexible EMI Measurement Sheet to Measure Electric and Magnetic Fields Separately with Distributed Antennas and LSI’s," IEEE International Symposium on Electromagnetic Compatibility, pp. 156-160, 2009
#2009045
L. Liu, T. Sakurai, and M. Takamiya, "A 1.28mW 100Mb/s Impulse UWB Receiver with Charge-Domain Correlator and Embedded Sliding Scheme for Data Synchronization," IEEE Symposium on VLSI Circuits, pp. 146-147, 2009
#2009046
Makoto Suzuki, Takuya Saraya, Ken Shimizu, Takayasu Sakurai, and Toshiro Hiramoto, "Post-Fabrication Self-Convergence Scheme for Suppressing Variability in SRAM Cells and Logic Transistors," Symposium on VLSI Technology, pp.148-149, 2009
#2009047
T. Sakurai, "Next-Generation Power-Aware Integrated Circuit Design," International Meeting for Future of Electron Devices Kansai (IMFEDK), K-3, pp.18-21, 2009
#2009048
安福正, 石田光一, 宮本晋示, 中井弘人, 高宮真, 桜井貴康, 竹内健, "三次元SSD用20Vブーストコンバータ向けのインダクタ設計," 電子情報通信学会, 信学技報, ICD2009-103, pp. 151-156, Nov. 2009
#2009049
石田光一, 増永直樹, 周　志偉, 安福　正, 関谷　毅, ツィーシャングウテ, クラークハーゲン, 高宮　真,染谷隆夫, 桜井貴康, "2V有機CMOSとシリコンCMOSを用いたEMI測定用風呂敷の原理検証," 電子情報通信学会, 信学技報, ICD2009-33, pp. 1-6, Oct. 2009
#2009050
L. Liu, T. Sakurai, and M. Takamiya, "A 100Mbps, 1.28mW Impulse Radio UWB Receiver with Charge-Domain Sampling Correlator in 0.18um CMOS," 電子情報通信学会, 信学技報, ICD2009-14, pp.7-11, Jul. 2009
#2009051
鈴木誠, 更屋拓哉, 清水健, 桜井貴康, 平本俊郎, "SRAMおよびロジックトランジスタにおける特性ばらつき一括自己修復手法," 応用物理学会シリコンテクノロジー分科会研究集会, pp.32-35, Jul. 2009
#2009052
増永直樹，石田光一，周志偉，安福正，関谷毅，Zschieschang Ute，Klauk Hagen，高宮真，染谷隆夫，桜井貴康, "8×8のコイルアレーと2V有機CMOSデコーダとEMI検出用LSIで構成された伸縮可能なEMI測定シートの提案と動作実証," 電子情報通信学会、LSIとシステムのワークショップ-267（IEEE SSCS Kansai Chapter Award 受賞）, ポスターセッション学生部門28, pp. 265-267, May 2009
#2009053
安福正,石田光一,宮本晋示,中井弘人,高宮真,桜井貴康,竹内健, "三次元積層NAND型フラッシュSSD向けプログラム電圧(20V)生成回路," 電子情報通信学会、LSIとシステムのワークショップ, ポスターセッション学生部門27（ICD優秀発表賞受賞）, pp. 262-264, May 2009
#2009054
安福正,石田光一,宮本晋示,中井弘人,高宮真,桜井貴康,竹内健, "三次元SSDの低電力化技術とSSD 向けプログラム電圧(20V)生成回路," 電子情報通信学会、信学技報, ICD2009-10, pp. 47-52, Apr. 2009
#2009055
桜井貴康, "設計から見たトランジスタのばらつきと極低電圧ロジック," 日経セミナー, pp.67-87, Jul. 2009
#2009056
桜井貴康, "グリーン化の切り札：極低電力回路・システム技術," STARC フォーラムシンポジウム 2009, pp.59-73, Aug. 2009
#2009057
桜井貴康, "組込みハードウェアの今後と研究ビジョン," 情報処理学会セミナー 2009, No.5, pp.171-20, Sep. 2009
#2009058
池内克之，稲垣賢一，草光秀樹，伊東利育，高宮　真，桜井貴康, "非接触コネクタ向け500Mbps容量結合通信用受信回路の検討," 電子情報通信学会総合大会, Mar. 2009
#2009059
石田光一，安福　正，高宮　真，竹内　健，桜井貴康, "NAND型フラッシュSSD向け20Vブーストコンバータの制御方式（その１）," 電子情報通信学会総合大会, Mar. 2009
#2009060
安福　正，石田光一，高宮　真，竹内　健，桜井貴康, "NAND型フラッシュSSD向け20Vブーストコンバータの制御方式（その２）," 電子情報通信学会総合大会, Mar. 2009
#2009061
坂井田耕輔，高宮　真，桜井貴康, "共振クロックにおける低速テストと低電力化を両立させるクロック分配回路の提案," 電子情報通信学会総合大会, Mar. 2009
#2009062
桜井貴康,"半導体の新技術と未来," 半導体/微細加工分野講演会, Mar.5, 2009

2008

#2008001
S.D.Choi, K. Ikeuchi, H.K.Kim, K.Inagaki, M. Takamiya, T.Sakurai,“Experimental Assessment of Logic Circuit Performance Variability with Regular Fabrics at 90nm Technology Node,”ESSCIRC, A2L-A1, Sept. 2008
#2008002
Taro Niiyama, Piao Zhe, Koichi Ishida, Masami Murakata, Makoto Takamiya, and Takayasu Sakurai, "Dependence of Minimum Operating Voltage (VDDmin) on Block Size of 90-nm CMOS Ring Oscillators and Its Implications in Low Power DFM," Proc. 9th International Symposium on Quality Electronic Design, March, 2008
#2008003
L.Liu, M.Takamiya, T.Sekitani, Y.Noguchi, S.Nakano, K.Zaitsu, T.Kuroda, T.Someya, and T.Sakurai, "A 107pJ/bit 100kbps 0.18um Capacitive Coupling Transceiver with Asynchronous Data Edge Signaling and DC Power-Free Pulse Detector for Printable Communication Sheet," ISSCC'08, pp.292-293, Feb.2008
#2008004
N.Miura, Y.Kohama, Y.Sugimori, H.Ishikuro, T.Sakurai, and T.Kuroda, "An 11Gb/s Inductive-Coupling Link with Burst Transmission," ISSCC'08, pp.298-299, Feb.2008
#2008005
T. Niiyama, P. Zhe, K.Ishida, M. Murakata, M. Takamiya, and T. Sakurai, "Dependence of Minimum Operating Voltage (VDDmin) on Block Size of 90-nm CMOS Ring Oscillators and Its Implications in Low Power DFM," Proc. 9th International Symposium on Quality Electronic Design (ISQED), pp. 136-136, March, 2008
#2008006
T. Niiyama, P. Zhe, K. Ishida, M. Murakata, M. Takamiya, and T. Sakurai, “Increasing Minimum Operating Voltage (VDDmin) with Number of CMOS Logic Gates and Experimental Verification with up to 1Mega-Stage Ring Oscillators," ISLPED'08, pp.117-122, Aug. 2008
#2008007
L.Liu, Y.Miyamoto, Z.Zhou, K.Sakaida, R.Jisun, K.Ishida, M.Takamiya and T.Sakurai, "A 100Mbps, 0.41mW, DC-960MHz Band Impulse UWB Transceiver in 90nm CMOS," Symp. on VLSI Circuits, June 2008
#2008008
Y.Nakamura, D.Levacq, L.Xiao, T.Minakawa, T.Niiyama, M.Takamiya, and T.Sakurai, "1/5 Power Reduction by Global Optimization based on Fine-Grained Body Biasing," CICC'08, pp. 547-550, Sept. 2008
#2008009
K.Ikeuchi, K.Inagaki, H.Kusamitsu, T.Ito, M.Takamiya, and T.Sakurai, "500Mbps, 670uW/pin Capacitively Coupled Receiver with Self Reset Scheme for Wireless Connectors," A-SSCC'08, pp.93-96, Nov. 2008
#2008010
T.Sakurai, "Next-Generation Power-Aware Design (Plenary Talk)", ISLPED08, Aug. 13, Bangalore, India.
#2008011
T.Sakurai, "Solving Issues of Integrated Circuits by 3D-Stacking Meeting with the Era of Power, Integrity Attackers and NRE Explosion and a Bit of Future (Pleanary Talk)," ESSCIRC, B4L-A1, Sept. 2008
#2008012
M.Takamiya, T.Sekitani, Y.Miyamoto, Y.Noguchi, H.Kawaguchi, T.Someya, T.Sakurai, "Design of Wireless Power Transmission Sheet with Organic FETs and Plastic MEMS Switches," Proceedings of International Symposium on Secure-Life Electronics, pp.557-561, Mar.2008
#2008013
K.Onizuka, M.Takamiya, T.Sakurai,"Recent Progress in On-Chip Power Supply Circuits," Proceedings of International Symposium on Secure-Life Electronics, pp.563-569, Mar.2008
#2008014
T.Niiyama, K.Ishida, M.Takamiya, T.Sakurai,"Expected Vectorless Teacher-Student Swap(TSS) Test method with Dual Power Supply Voltages for 0.3V Homogeneous Multi-core LSI's," IEEE 2008 Custom Inegrated Circuits Conference, Paper#8.5, pp.137-140, Sept.2008
#2008015
T.Sakurai, "Solving Issues of LSI by 3-Dimensional System-in-Package (Plenary talk)," International Conference on Electronics Packaging, Jan.2008
#2008016
T.Someya, T.Sekitani, M.Takamiya, T.Sakurai ,"Recent Progress of Wireless Transmission Systems Using Printed Plastic MEMS Switches and Organic Transistors," Eighth International Workshop on Micro and Nanotechnology for Power Generation and Energy Conversion Applications (PowerMEMS + microEMS 2008), Nov.2008
#2008017
Y.Kato, T.Sekitani, Y.Noguchi, M.Takamiya, T.Sakurai, T. Someya ,"A large-area, flexible, ultrasonic imaging system with a printed organic transistor active matrix," IEEE International Electron Devices Meeting (IEDM) ,Paper#4.7, Dec.2008
#2008018
N.Miura, Y.Kohama, Y.Sugimori, H.Ishikuro, T.Sakurai, and T.Kuroda, "An 11Gb/s Inductive-Coupling Link with Burst Transmission," ISSCC'08 digest of technical papers, pp.298-299, Feb.2008
#2008019
N.Miura, H.Ishikuro, K.Niitsu, T.Sakurai, and T.Kuroda, "A 0.14pJ/b Inductive-Coupling Transceiver with Digitally-Controlled Precise Pulse Shaping," IEEE Journal of Solid-State Circuits (JSSC), vol.43, no.1, pp.285-291, Jan. 2008
#2008020
T.Sakurai, "Next-Generation Power-Aware Design (Plenary Talk)," ISLPED'08, Bangalore, India, Aug.2008
#2008021
T.Sakurai, "Variability and Ultra-low Voltage Logic Design," ISSCC 2009 digest of technical papers, Forum 4 Ultra-Low-Voltage Circuit Design, p.507, Feb.2008
#2008022
関谷毅、Ute Zschieschang, Hagen Klauk, 高宮真、桜井貴康、染谷隆夫 ,"有機トランジスタの印刷製造・信頼性とフレキシブルデバイスへの応用," ポリマーフロンティア21 プラスチックエレクトロニクス最前線　～フレキシブルデバイスへの展望 ,高分子学会,2008
#2008023
甲斐康司、藤島実、桜井貴康, "2025年の半導体技術誰が何を作るのか「マイクロキューブ・チップ」「インチ・ファブ」," 日経マイクロデバイス特別編集版, Aug.2008
#2008024
"集積回路の近未来," 日経産業新聞, 2008年8月21日
#2008025
桜井貴康, "集積回路の将来と課題," Jissoフォーラム2008,アパホテル＆リゾート東京ベイ幕張ホール ,2008
#2008026
桜井貴康, "Si-LSIの将来技術動向 ,３次元積層による集積回路の課題解決," 日立製作所総合教育センター ,2008
#2008027
桜井貴康, "３次元SiPの開発動向と将来展望," ３次元LSI/SiP/PoP講演,総評会館 ,Apr-08.2008
#2008028
桜井貴康, "低電力集積回路の最近の話題," 半導体シニア協会特別講演会,Sep-08. 2008
#2008029
桜井貴康, "新たな展開を見せる三次元集積化技術,"TEL Advanced Technology Forum 2008,東京エレクトロン山梨事業所 ,Sep-08, 2008
#2008030
桜井貴康, "低電力集積回路の最近の話題," SSIS2008年度賛助会員連絡会特別講演会, Oct-08, 2008
#2008031
甲斐康司、藤島実、桜井貴康, "2025年の半導体技術誰が何を作るのか「マイクロキューブ・チップ」「インチ・ファブ」," 日経マイクロデバイス特別編集版, Aug. 2008
#2008032
Y.Kato, T.Sekitani, Y.Noguchi, M.Takamiya, T.Sakurai, T. Someya, "A large-area, flexible, ultrasonic imaging system with a printed organic transistor active matrix," IEEE International Electron Devices Meeting (IEDM), #4.7, Dec. 2008
#2008033
N. Miura, H. Ishikuro, K. Niitsu, T. Sakurai, and T. Kuroda, "A 0.14pJ/b Inductive-Coupling Transceiver with Digitally-Controlled Precise Pulse Shaping," IEEE Journal of Solid-State Circuits (JSSC), vol.43, no.1, pp.285-291, Jan. 2008
#2008034
増永直樹，石田光一，周　志偉，安福　正，関谷　毅，高宮　真，染谷隆夫，桜井貴康, "伸縮可能なEMI測定シートにおけるEMI測定用LSIの設計と評価," 電子情報通信学会総合大会, Mar. 2008
#2008035
関谷毅、Ute Zschieschang, Hagen Klauk, 高宮真、桜井貴康、染谷隆夫, "有機トランジスタの印刷製造・信頼性とフレキシブルデバイスへの応用," ポリマーフロンティア21 プラスチックエレクトロニクス最前線　～フレキシブルデバイスへの展望, 高分子学会, Sep. 2008
#2008036
桜井貴康,"東大がシート状の通信媒体を開発　有線と無線の組み合わせで消費電力削減," EETIMES Japan,no.32, p.20, 2008
#2008037
桜井貴康,"（特別ロングインタビュー)画期的ローパワー、大面積エレクトロニクスを追求," 半導体産業新聞, Feb.6, 2008
#2008038
桜井貴康,"（特別ロングインタビュー)ローパワーの決め手は「電源」の電圧コントロール," 半導体産業新聞, Feb.13, 2008

2007

#2007001
Takayasu Sakurai, "Meeting with the Forthcoming IC Design - The Era of Power, Variability and NRE Explosion and a Bit of the Future," Asia and South Pacific Design Automation Conference, pp.viii, Jan. 2007
#2007002
Takayasu Sakurai, "Advances in Low-Power Integrated Circuits and Large-Area Electronics for Ubiquitous Electrinics-Solving Issues with 3D-Stacking-," Proceedings of COE Sympoium on Advanced Electtrinics for Future Generations, 1, pp.89-94, Jan. 2007
#2007003
M. Takamiya, T. Sekitani, Y. Kato, H. Kawaguchi, T. Someya, and T. Sakurai, "An Organic FET SRAM With Back Gate to Increase Static Noise Margin and Its Application to Braille Sheet Display," IEEE Journal of Solid-State Circuits, Vol.42, No.1, pp.93-100, Jan. 2007
#2007004
N. Miura, D. Mizoguchi, M. Inoue, K. Niitsu, Y. Nakagawa, M. Tago, M. Fukaishi, T. Sakurai, and T. Kuroda, "A 1 Tb/s 3W Inductive-Coupling Transceiver for 3D-Stacked Inter-Chip Clock and Data Link," IEEE Journal of Solid-State Circuits, Vol.42, No.1, pp.111-122, Jan. 2007
#2007005
Takayasu Sakurai, "Organic-Transistor Circuit Design," IEEE International Solid-State Circuits Conference , U.S.A., T8, Feb. 11, 2007
#2007006
M. Takamiya, T. Sekitani, Y. Miyamoto, Y. Noguchi, H. Kawaguchi, T. Someya, and T. Sakurai, "Design Solutions for a Multi-Object Wireless Power Transmission Sheet Based on Plastic Switches," IEEE International Solid-State Circuits Conference, pp.362-609, Feb. 2007
#2007007
N. Miura, H. Ishikuro, T. Sakurai, and T. Kuroda, "A 0.14pJ/b Inductive-Coupling Inter-Chip Data Transceiver with Digitally-Controlled Precise Pulse Shaping," IEEE International Solid-State Circuits Conference, pp.358-608, Feb. 2007
#2007008
Y. Kato, T. Sekitani, M. Takamiya, M. Doi, K. Asaka, T. Sakurai, and T. Someya, "Sheet-Type Braille Displays by Integrating Organic Field-Effect Transistors and Polymeric Actuators," IEEE Transactions on Electron Devices, Vol.54, No.2, pp.202-209, Feb. 2007
#2007009
N. Miura, T. Sakurai, and T. Kuroda, "Crosstalk Countermeasures for High-Density Inductive-Coupling Channel Array," IEEE Journal of Solid-State Circuits, Vol.42, No.2, pp.410-421, Feb. 2007
#2007010
桜井貴康, "電源ケーブルを使わずに電力供給　東大が電力伝送用シートを開発," EETIMES Japan, 20, pp.16, Feb. 2007
#2007011
桜井貴康, "（特別講演）設計から見た3次元SiPソリューション," 半導体ロードマップ専門委員会　第一部　ITRS2006　Updateに見る今後のLSI技術の方向性, コクヨホール, 8F, Mar. 8, 2007
#2007012
桜井貴康, "半導体ベンチャー列伝," 東洋経済, pp.277, Mar. 8, 2007
#2007013
新山太郎, 高宮真, 桜井貴康, "超低電圧領域におけるリングオシレータの発振周波数ばらつき," 電子情報通信学会総合大会, 名城大学, C-12-14, pp.93, Mar. 21, 2007
#2007014
Takayasu Sakurai, "Sloving issues of VLSI by 3D-SiP-From design perspective," Technical Digest of the International 3D System Integration Conference, Tokyo, 14, Mar. 27, 2007
#2007015
Kazuki Hizu, Tsuyoshi Sekitani, Joe Otsuki, Makoto Takamiya, Takayasu Sakurai, and Takao Someya, "Air-stable operation of organic complementary circuits on a polyimide film," The Fourth International Conference on Molecular Electronics and Bioelectronics (M&BE4), Mar. 2007
#2007016
Y. Kato, T. Sekitani, M. Takamiya, M. Doi, K. Asaka, T. Sakurai, and T. Someya, "Integration of organic semiconducting nano-materials and polymer actuators and their application," 2007 Frontiers in Nanoscale Science and Technology, Tokyo, A15, Mar. 2007
#2007017
鬼塚浩平, 桜井貴康, "低電力・低コストな三次元積層LSIのためのオンチップ電源回路技術," 東京大学 21世紀COE 未来社会を担うエレクトロニクスの展開　平成18年度大学院博士課程学生報告書, pp.6-7, Mar. 2007
#2007018
中村安見, 桜井貴康, "高圧電源を用いた電源ノイズの低減," 東京大学 21世紀COE 未来社会を担うエレクトロニクスの展開　平成18年度大学院博士課程学生報告書, pp.8-9, Mar. 2007
#2007019
関谷毅, 高宮真, 野口儀晃, 中野慎太郎, 加藤祐作, 比津和樹, 桜井貴康, 染谷隆夫, "有機トランジスタとプラスティック接点スイッチを用いたワイヤレス電力伝送シート," 2007年春季第54回応用物理学関係連合講演会, 神奈川, 30a-W-8, Mar. 2007
#2007020
K. Hizu, T. Sekitani, J. Otsuki, M. Takamiya, T. Sakurai, and T. Someya, "Air-stable operation of complementary circuits on plastic film using n-type organic semiconductor molecules," ナノ光電子デバイスと量子情報エレクトロニクス, 東京ガーデンパレス, pp.21, Mar. 2007
#2007021
Y. Kato, T. Sekitani, M. Takamiya, M. Doi, K. Asaka, T. Sakurai, and T. Someya, "Integration of organic semiconducting nano-materials and plastic actuators for sheet-type Braille displays," ナノ光電子デバイスと量子情報エレクトロニクス, 東京ガーデンパレス, pp.20, Mar. 2007
#2007022
S. Nakano, T. Sekitani, S. Takatani, M. Takamiya, T. Sakurai, and T. Someya, "Printed Plastic Switch Array for the Application to High Power Electronics," Material Research Society (MRS) Spring Meeting, San Francisco, USA, N8.9, Apr. 2007
#2007023
T. Someya, T. Sekitani, Y. Noguchi, S. Nakano, S. Takatani, M. Takamiya, and T. Sakurai, "Printed Organic Transistors for Large-area Sensors and Actuators," Material Research Society (MRS) Spring Meeting, San Francisco, USA, O10.6, Apr. 2007
#2007024
Fayez Robert Saliba, Hiroshi Kawaguchi, and Takayasu Sakurai, "A Self-Alignment Row-by-Row Variable-VDD Scheme Reducing 90% of Active-Leakage Power in SRAM's," IEICE Transactions on Electronics, Vol.Vol.E90-C, No.4, pp.743-748, Apr. 2007
#2007025
Koichi Ishida, Atit Tamtrakarn, Hiroki Ishikuro, Makoto Takamiya, and Takayasu Sakurai, "An Outside-Rail Opamp Design Relaxing Low-Voltage Constraint on Future Scaled Transistors," IEICE Transactions on Electronics, Vol.Vol.E90-C, No.4, pp.786-792, Apr. 2007
#2007026
Kiichi Niitsu, Noriyuki Miura, Mari Inoue, Yoshihiro Nakagawa, Masamoto Tago, Masayuki Mizuno, Takayasu Sakurai, and Tadahiro Kuroda, "Daisy Chain Transmitter for Power Reduction in Inductive-Coupling CMOS Link," IEICE Transactions on Electronics, Vol.Vol.E90-C, No.4, pp.829-835, Apr. 2007
#2007027
Tsuyoshi Sekitani, Makoto Takamiya, Yoshiaki Noguchi, Shintaro Nakano, Yusaku Kato, Takayasu Sakurai, and Takao Someya, "A large-area wireless power-transmission sheet using printed organic transistors and plastic MEMS switches," Nature Materials, Vol.6, No., pp.413-417, Apr. 2007
#2007028
Makoto Takamiya, Tsuyoshi Sekitani, Yoshio Miyamoto, Yoshiaki Noguchi, Hiroshi Kawaguchi, Takao Someya, and Takayasu Sakurai, "Design for Mixed Circuits of Organic FETs and Plastic MEMS Switches for Wireless Power Transmission Sheet," IEEE International Conference on Integrated Circuit Design and Technology, pp.168-171, June 1, 2007
#2007029
Kohei Onizuka, Makoto Takamiya, Hiroshi Kawaguchi, and Takayasu Sakurai, "A design methodology of chip-to-chip wireless power transmission system," IEEE International Conference on Integrated Circuit Design and Technology, pp.143-146, June 1, 2007
#2007030
Yasumi Nakamura, Makoto Takamiya, and Takayasu Sakurai, "An On-Chip Noise Canceller with High Voltage Supply Lines for Nanosecond-Range Power Supply Noise," IEEE Symposium on VLSI Circuits, pp.124-125, June 2007
#2007031
Takao Someya, Takayasu Sakurai, Tsuyoshi Sekitani, and Yoshiaki Noguchi, "Printed Organic Transistors for Large-Area Electronics," 6th International Conference on Polymers and Adhesives in Microelectronics and Photonics, pp.6-11, June 2007
#2007032
Tsuyoshi Sekitani, Makoto Takamiya, Shintaro Nakano, Yoshiaki Noguchi, Yusaku Kato, Takayasu Sakurai, and Takao Someya, "Printed organic transistor circuits for a large-area wireless power transmission sheet," 3rd Annual Organic Microelectronics Workshop, Seattle, USA, July 2007
#2007033
川口博, 高宮真, 関谷毅, 宮本喜生, 野口儀晃, 染谷隆夫, 桜井貴康, "有機トランジスタとプラスチックMEMSスイッチを集積化した無線電力伝送シート向けの回路技術," 電子情報通信学会　信学技報, 神戸, ICD2007-63, pp.153-158, July 2007
#2007034
桜井貴康, "ムーアの法則の限界を超えて," 日経産業新聞, 半導体総合　広告特集, pp.16, Aug. 21, 2007
#2007035
中村安見, 高宮真, 桜井貴康, "高圧電源線を用いたオンチップ電源線ノイズキャンセラ," 電子情報通信学会　信学技報, 北見, ICD2007-85, pp.91-94, Aug. 24, 2007
#2007036
桜井貴康, "新分野開拓に向けてポリマーMEMSに注目," 日経マイクロデバイス, 8, pp.37, Aug. 2007
#2007037
王瑶, 鬼塚浩平, 高宮真, 桜井貴康, "室内マルチオブジェクトの空間的位置同定システムに関する一検討," 電子情報通信学会エレクトロニクスソサイエティ大会, 鳥取大学, C-12-30, pp.85, Sep. 12, 2007
#2007038
新山太郎, 朴哲, 高宮真, 桜井貴康, "オンチップ太陽電池駆動287mV, 13.3MHzリングオシレータ," 電子情報通信学会ソサイエティ大会, 鳥取大学, C-12-36, pp.91, Sep. 12, 2007
#2007039
宮本喜生, 高宮真, 桜井貴康, "UWBインパルス通信向けパルス生成回路," 電子情報通信学会エレクトロニクスソサイエティ大会, 鳥取大学, C-12-37, pp.92, Sep. 12, 2007
#2007040
周志偉, 劉楽昌, 高宮真, 桜井貴康, "線形性に優れたデジタル制御しきい電圧可変コンパレータ," 電子情報通信学会ソサイエティ大会, 鳥取大学, C-12-30, Sep. 12, 2007
#2007041
Takayasu Sakurai, "(Invited)Meeting with the Forthcoming IC Design-Solving issues by 3D stacking," SBCCI2007, Rio de Janeiro, Bragil, pp.2, Sep. 2007
#2007042
D. Levacq, M. Yazid, H. Kawaguchi, M. Takamiya, and T. Sakurai, "Half VDD Clock-Swing Flip-Flop with Reduced Contention for up to 60% Power Saving in Clock Distribution," 33rd European Solid-State Circuits Conference (ESSCIRC), Munich, Germany, pp.190-193, Sep. 2007
#2007043
D. Levacq, T. Minakawa, M. Takamiya, and T. Sakurai, "A Wide Range Spatial Frequency Analysis of Intra-Die Variations with 4-mm 4000 x 1 Transistor Arrays in 90nm CMOS," IEEE Custom Integrated Circuits Conference (CICC), San Jose, USA, pp.257-260, Sep. 2007
#2007044
関谷毅, 野口儀晃, 中野慎太郎, 加藤祐作, 高宮真, 桜井貴康, 染谷隆夫, "印刷技術を用いた有機トランジスタ・接点スイッチと大面積ワイヤレス電力伝送シート," 2007年秋季第68回応用物理学会学術講演会, 札幌, 8a-D-1, Sep. 2007
#2007045
Takayasu Sakurai and Takao Someya, "ワイヤレス電力伝送シート," 応用物理, 第76巻, 第10号, pp.1159-1163, Oct. 2007
#2007046
桜井貴康, "（特別講演）設計から見た3次元SiPソリューション," エレクトロニクス実装学会ワークショップ, ラフォーレ修善寺, Nov. 18, 2007
#2007047
桜井貴康, "（基調講演）異分野連携、イノベーション、世界," 第11回システムLSIワークショップ, 北九州国際会議場, Nov. 19, 2007
#2007048
D. Levacq, M. Takamiya, and T. Sakurai, "Backgate Bias Accelerator for 10ns-order Sleep-to-Active Modes Transition Time," IEEE Asian Solid-State Circuits Conference (A-SSCC), Jeju, Korea, pp.296-299, Nov. 2007
#2007049
K. Onizuka, K. Inagaki, H. Kawaguchi, M. Takamiya, and T. Sakurai, "Stacked-Chip Implementation of On-Chip Buck Converter for Distributed Power Supply System in SiPs," IEEE Journal of Solid-State Circuits, Vol.42, No.11, pp.2404-2410, Nov. 2007
#2007050
Hiroshi Kawaguchi, Danardono Dwi Antono, and Takayasu Sakurai, "Closed-Form Expressions for Crosstalk Noise and Worst-Case Delay on Capacitively Coupled Distributed RC Lines," IEICE Transactions on Electronics, Vol.Vol.E90-A, No.12, pp.2669-2681, Nov. 2007
#2007051
M. Takamiya, T. Sekitani, Y. Miyamoto, Y. Noguchi, H. Kawaguchi, T. Someya, and T. Sakurai, "(Invited) Wireless Power Transmission Sheet with Organic FETs and Plastic MEMS Switches," International Display Workshop (IDW), Sapporo, Japan, pp.95-98, Dec. 2007
#2007052
T. Sekitani, Y. Noguchi, S. Nakano, K. Zaitsu, Y. Kato, M. Takamiya, T. Sakurai, and T. Someya, "Communication Sheets Using Printed Organic Nonvolatile Memories," IEEE International Electron Devices Meeting (IEDM), Washington DC, USA, Dec. 2007
#2007053
桜井貴康, "2次元から3次元への転換で半導体は新たなステージへ," 日経マイクロデバイス特別編集版, pp.20-21, 2007

2006

#2006001
T. Someya, T. Sekitani, and T. Sakurai, "Organic TFT-AM for Large-Area Sensors and Actuators," 2006 International Thin-Film Transistor Conference, Session 6: Emerging Technology, Kitakyushu, 6.1, Jan. 19, 2006
#2006002
鬼塚浩平, 桜井貴康, "ナノ秒オーダーで変移可能なオンチップ電源回路向けVDDホッピングアクセラレータ," 電子情報通信学会技報, 105, 569, pp.13-17, Jan. 2006 (PDF)
#2006003
N. Miura, D. Mizoguchi, M. Inoue, T. Sakurai, and T. Kuroda, "A 195-Gb/s 1.2-W Inductive Inter-Chip Wireless Superconnect for 3-D-Stacked System in a Package," IEEE Journal of Solid-State Circuits (JSSC), Vol.41, No.1, pp.23-34, Jan. 2006
#2006004
S. Iba, Y. Kato, T. Sekitani, H. Kawaguchi, T. Sakurai, and T. Someya, "Use of laser drilling in the manufacture of organic inverter circuits," Analytical and Bioanalytical Chemistry, Vol.384, No.2, pp.374-377, Jan. 2006
#2006005
T. Someya, T. Sakurai, and T. Sekitani, "Recent Progress of Flexible Large-area Sensors and Actuators with Organic Transistor Integrated Circuits," COEミニワークショップ「強相関エレクトロニクスの進展」, 東京大学柏キャンパス, Jan. 2006
#2006006
染谷隆夫, 関谷毅, 桜井貴康, "有機トランジスタのDCストレス," 特定領域研究「新しい環境下における分子性導体の特異な機能の探索」第４回シンポジウム, Jan. 2006
#2006007
石田光一, アティットタムタカーン, 石黒仁揮, 桜井貴康, "スケーリングされたトランジスタに適応した高耐圧オペアンプ設計," ICD研究会信学技報Vol. 105, pp.1-6, Jan. 2006 (PDF)
#2006008
K. Ishida, A. Tamtrakarn, and T. Sakurai, "A 0.5-V Sigma-Delta Modulator Using Analog T-Switch Scheme for the Subthreshold Leakage Suppression," 2006 IEEE Asia and South Pacific Design Automation Conference, pp.98-99, Jan. 2006 (PDF)(PDF2)
#2006009
亀岡秋男, 桜井貴康, 東哲郎, 谷重雄, "産業界創造に向けての効果的な研究　開発の推進を目指す技術戦略マップ," 経済産業ジャーナル(経済産業調査会), Feb. 1, 2006
#2006010
呉文豪, "電源電圧、しきい値電圧の動的制御によるVLSI低消費電力化の研究," 修士論文, Feb. 2007
#2006011
N. Miura, D. Mizoguchi, M. Inoue, K. Niitsu, Y. Nakagawa, M. Tago, M. Fukaishi, T. Sakurai, and T. Kuroda, "A 1Tb/s 3W Inductive-Coupling Transceiver for Inter-Chip Clock and Data Link," IEEE International Solid-State Circuits Conference (ISSCC'06), pp.424-425, Feb. 2006
#2006012
桜井貴康, "産学連携を成功させるもう1つの方法," 学生向け特別編集版明日のエンジニアへの手紙 2005 (日経BP社), Feb. 2006
#2006013
M. Takamiya, T. Sekitani, Y. Kato, H. Kawaguchi, T. Someya, and T. Sakurai, "An Organic FET SRAM for Braille Sheet Display with Back Gate to Increase the Static Noise Margin," IEEE International Solid-State Circuits Conference (ISSCC'06), pp.276-277, Feb. 2006
#2006014
Y. Kato, T. Sekitani, M. Takamiya, Masao Doi, K. Asaka, T. Sakurai, and T. Someya, "Sheet-Type Braille Displays by Integrating Organic Field-Effect Transistors and Polymeric Actuators," IEEE Transactions on Electron Devices, Vol.54, No.2, pp.202-209, Feb. 2007
#2006015
亀岡秋男, 桜井貴康, 東哲郎, 谷重雄, "産業界創造に向けての効果的な研究　開発の推進を目指す技術戦略マップ," 経済産業ジャーナル(経済産業調査会), pp.6-15, Feb. 2006
#2006016
皆川拓也, "ナノメートル世代の低消費電力CMOSロジックライブラリの研究," 修士論文, Feb. 2007
#2006017
石田将也, "ウルトラワイドバンド無線通信にむけた低消費電力CMOS受信回路の研究," 修士論文, Feb. 2007
#2006018
鬼塚浩平, 桜井貴康, "低電力VLSIで使用される電源回路技術," 東京大学21世紀COE「未来を担うエレクトロニクスの展開」平成17年度大学院博士課程学生報告書, 東京大学, pp.12-13, Mar. 14, 2006
#2006019
C. Q. Tran, H. Kawaguchi, and T. Sakurai, "Low-Power Low-Leakage FPGA Design Using Zigzag Power Gating Dual-VTH/VDD and Micro-VDD-Hopping," IEICE Transactions on Electronics, Vol.E89-C, No.3, pp.280-286, Mar. 2006
#2006020
D. D. Antono, K. Inagaki, H. Kawaguchi, and T. Sakurai, "Trends of On-Chip Interconnects in Deep Sub-Micron ," IEICE Transactions on Electronics, Vol.E89-C, No.3, pp.392-394, Mar. 2006 (PDF)
#2006021
Atit Tamtrakarn and T. Sakurai, "Low-power Circuits and Architectures for Ultra-Wide-Band(UWB) Transceiver toward Ubiquitous Electronics Applications," 博士論文, 東京大学, Mar. 2006
#2006022
D. D. Antono and T. Sakurai, "Modeling and Characterization of Electrical Behaviors of Interconnects in Deep Sub-micron VLSI's," 博士論文, 東京大学, Mar. 2006
#2006023
C. Q. Tran and T. Sakurai, "Low-power Nano-meter CMOS Circuit Design with Application to FPGA," 博士論文, 東京大学, Mar. 2006
#2006024
Daisuke Mizoguchi, Noriyuki Miura, Takayasu Sakurai, and Tadahiro Kuroda, "A 1.2 Gbps Non-contact 3D-Stacked Inter-Chip Data Communications Technology," IEICE Transactions on Electronics, E89-C, 3, pp.320-326, Mar. 2006
#2006025
T. Someya, T. Sakurai, and T. Sekitani, "Future Prospects of Flexible, Large-Area Sensors and Actuators with Organic Transistor ICs," 2006 VLSI-TSA conference, Taiwan, Apr. 24, 2006
#2006026
T. Someya, Y. Noguchi, Y. Kato, T. Sekitani, and T. Sakurai, "Printed organic transistors for large-area, flexible sensors and actuators," Material Research Society （MRS) Spring Meeting, Symposium L: Materials for Next-Generation Display Systems, San Francisco, Apr. 2006
#2006027
T. Someya, T. Sekitani, and T. Sakurai, "Conformable electronic artificial skins with organic transistor integrated circuits," Material Research Society （MRS) Spring Meeting, Symposium CC: Electrobiological Interfaces on Soft Substrates, San Francisco, Apr. 2006
#2006028
K. Hizu, T. Sekitani, Y. Shimada, J. Otsuki, M. Takamiya, T. Sakurai, and T. Someya, "Low voltage operation of organic CMOS inverter circuit with double-gate structure," Material Research Society （MRS) Spring Meeting, Symposium M: Conjugated Organic Materials - Synthesis, Structure, Device and Applications, San Francisco, Apr. 2006
#2006029
T. Sekitani, Y. Takamatsu, S. Nakano, T. Sakurai, and T. Someya, "Hall effect measurements using pentacene thin-film transistors on plastic films," Material Research Society （MRS) Spring Meeting, Symposium M: Conjugated Organic Materials - Synthesis, Structure, Device and Applications, San Francisco, Apr. 2006
#2006030
T. Sekitani, T. Someya, and T. Sakurai, "Effects of Annealing on Pentacene Field-Effect Transistors using Polyimide Gate Dielectric Layers," Journal of Applied Physics, Vol.100, 024513, No., Apr. 2006
#2006031
K. Ishida, K. Kanda, A. Tamtrakarn, H. Kawaguchi, and T. Sakurai, "Managing Subthreshold Leakage in Charge-Based Analog Circuits with Low-VTH Transistors by Analog T- Switch (AT-Switch) and Super Cut-off CMOS," IEEE Journal of Solid-State Circuits (JSSC), Vol.41, No.4, pp.859-867, Apr. 2006 (PDF)
#2006032
K. S. Min, H. D. Choi, H. Y. Choi, H. kawaguchi, and T. Sakurai, "Leakage-Suppressed Clock-Gating Circuit with Zigzag Super Cut-Off CMOS (ZSCCMOS) for Leakage-Dominant Sub70-nm and Sub-1-V-VDD LSIs," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol.14, No.4, pp.430-435, Apr. 2006
#2006033
染谷隆夫, 関谷毅, 桜井貴康. , "フレキシブルセンサー、「有機基板上の電子デバイス」 ," シーエムシー出版, pp.327-337, Apr. 2006
#2006034
関谷毅, 桜井貴康, 染谷隆夫, "有機結晶薄膜を用いた集積回路," 応用物理学会結晶工学分科会主催第124回結晶工学分科会研究会, Apr. 2006
#2006035
T. Someya, T. Sekitani, and T. Sakurai, "Printed organic transistors for large-area electronics," The 6th International Meeting on Information Display and the International Display Manufacturing Conference (IMID/IDMC 2006), Display Electronics & System, Exhibition & Convention Center (EXCO) in Daegu, Korea, May 8, 2006
#2006036
T. Someya, T. Sekitani, and T. Sakurai, "Conformable, lightweight, large-area sheet-type sensors with organic transistor integrated circuits," Symposium Q: Chem & Bio Sensing Transistors: from Materials to Systems, The European Materials Research Society (E-MRS 2006) Spring Meeting, Acropolis Congress Center, Nice, France, May 2006
#2006037
桜井貴康, "産学連携の当事者の立場から、基礎研究の成果を実用に展開する仕組みのあるべき姿," パシフィコ横浜　会議センター3F大会議室, May 2006
#2006038
M. Takamiya, T. Sekitani, Y. Kato, H. Kawaguchi, T. Someya, and T. Sakurai, "Low Power and Flexible Braille Sheet Display with Organic FET's and Plastic Actuators," IEEE International Conference on IC Design and Technology (ICICDT), Padova, Italy, pp.219-222, May 2006
#2006039
T. Someya, T. Sakurai, and T. Sekitani, "Recent progress of organic TFT active matrices for large-area electronics applications," International Congress of Imaging Science: ICIS'06, Rochester, New York, May 2006
#2006040
三浦典之, 溝口大介, 井上眞梨, 新津葵一, 中川源洋, 田子雅基, 深石宗生, 桜井貴康, 黒田忠広, "1Tb/s 3W チップ間誘導結合クロックデータトランシーバ," 電子情報通信学会技報, 106, 71, pp.95-100, May 2006
#2006041
川口博, 高宮真, 関谷毅, 加藤祐作, 染谷隆夫, 桜井貴康, "有機トランジスタとプラスチックアクチュエータを集積化したフレキシブルな点字ディスプレイ向けの回路技術," 電子情報通信学会技報, ICD2006-22, pp.1-6, May 2006
#2006042
野口儀晃, 関谷毅, 桜井貴康, 染谷隆夫, "印刷プロセスを利用した有機電界効果トランジスタの作製," ナノ光・電子デバイスシンポジウム　～量子ドットとフォトニック結晶～, 東京　四谷　主婦会館プラザエフ, May 2006
#2006043
T. Sekitani, Y. Kato. K, Asaka, Masao Doi, M. Takamiya, T. Sakurai, and T. Someya, "Integration of Soft Actuators with Organic Transistor Integrated Circuits for Sheet-type Braille Displays," ナノテクとバイオの融合研究―人工筋肉開発の展望(第３回人工筋肉コンファレンス), 東京秋葉原コンベンションセンター, May 2006
#2006044
染谷隆夫, 関谷毅, 野口儀晃, 中野慎太郎, 桜井貴康 , "金属ナノ粒子のインクジェット印刷と有機トランジスタへの応用," ナノ光・電子デバイスシンポジウム　～量子ドットとフォトニック結晶～, 東京四谷, May 2006
#2006045
M. Inoue, N. Miura, K. Niitsu, Y. Nakagawa, M. Tago, M. Fukaishi, T. Sakurai, and T. Kuroda, "Daisy Chain for Power Reduction in Inductive-Coupling CMOS Link," IEEE Symposium on VLSI Circuits, 8.3, pp.80-81, June 15, 2006 (PDF)
#2006046
K. Inagaki, D. Antono, M. Takamiya, S. Kumashiro, and T. Sakurai, "A 1-ps Resolution On-chip Sampling Oscilloscope with 64:1 Tunable Sampling Range Based on Ramp Waveform Division Scheme," IEEE Symposium on VLSI Circuits, 8.1, pp.76-77, June 15, 2006 (PDF)
#2006047
T. Sekitani, Shingo Iba, Y. Kato, Y. Noguchi, T. Sakurai, and T. Someya, "Submillimeter radius bendable organic field-effect transistors," JOURNAL OF NON-CRYSTALLINE SOLIDS, Vol.352, No., pp.1769-1773, June 15, 2006
#2006048
A. Tamtrakarn, H. Ishikuro, K. Ishida, M. Takamiya, and T. Sakurai, "A 1-V 299μW Flashing UWB Transceiver Based on Double Thresholding Scheme," IEEE Symposium on VLSI Circuits, 23.2, pp.250-251, June 17, 2006
#2006049
T. Someya, T. Sakurai, and T. Sekitani, "Large-area Electronics Based on Organic Transistors," 64th Device Research Conference (DRC), Penn State University, June 28, 2006
#2006050
T. Sakurai, "Short Course on Optimal Interconnect Design - A Systems Perspestive," IEEE International Interconnect Technology Conference (IITC), Hyatt Regency at San Francisco Airport, June 2006
#2006051
T. Sekitani, Y. Takamatsu, S. Nakano, T. Sakurai, and T. Someya, "Hall effect measurements using polycrystalline pentacene field-effect transistors on plastic films," Applied Physics Letters, Vol.88(25), No.Art. No. 253508, June 2006
#2006052
桜井貴康, "集積回路の最先端と未来," 第33回イブニングセミナー, 東京大学生産技術研究所, June 2006
#2006053
桜井貴康, "STARCへのメッセージ," あすかとAS☆PLA, 半導体理工学研究センター, June 2006
#2006054
T. Someya, T. Sakurai, and T. Sekitani, "Flexible, Large-Area Sensors and Actuators using Organic Transistor Integrated Circuits," 2006 Asia-Pacific Workshop on Fundamental and Application of Advanced Semiconductor Devices (AWAD2006), Tohoku University, July 3, 2006
#2006055
T. Someya, T. Sakurai, and T. Sekitani, "Large-area Electronics Based on Organic Transistor ICs," 2nd Annual Organic Microelectronics Workshop, Tronto, July 9, 2006
#2006056
N. Miura, Y. Nakagawa, M. Tago, M. Fukaishi, T. Sakurai, and T. Kuroda, "A 1Tb/s 3W Inductive-Coupling Transceiver for 3D ICs," 2006 Intenational PhD Workshop on SoC (IPS), July 2006
#2006057
桜井貴康, "半導体集積回路の課題と展望," 第29回アドバンテスト技術発表会, アドバンテスト群馬R&Dセンタ, July 2006
#2006058
T. Sekitani, Y. Noguchi, T. Sakurai, and T. Someya, "Inkjet Printing of 33 cm Organic Field-Effect Transistor Active Matrices for the Application to Electronic Artificial Skins," 2006 The International Conference on Science and Technology of Synthetic Metals (ICSM2006), Trinity College Dublin in Ireland, July 2006
#2006059
T. Someya, T. Sakurai, and T. Sekitani , "Flexible, Large-Area Electronics Using Organic Transistors," 25th Electronic Materials Symposium, Session G: Organic Electronics, ホテルサンバレー富士見, July 2006
#2006060
比津和樹, 関谷毅, 島田よう子, 大月穣, 高宮真, 桜井貴康, 染谷隆夫, "ダブルゲート構造による有機CMOS回路の低電圧駆動," 有機エレクトロニクス(OME)研究会, #7, July 2006
#2006061
桜井貴康, "集積回路の課題と未来," 平成18年度集中講義極限知能デバイス工学, pp.33-58, July 2006
#2006062
稲垣賢一, ダナルドノドゥイアントノ, 高宮真, 熊代成孝, 桜井貴康, "ランプ波形分割方式を用いたオンチップサンプリングオシロスコープ," 電子情報通信学会技報, 106, 206, pp.25-30, Aug. 2006 (PDF)
#2006063
比津和樹, 関谷毅, 大月穣, 桜井貴康, 染谷隆夫, "金属/有機封止膜によるN型有機電界効果トランジスタの大気安定性向上," 秋季第67回応用物理学学術講演会 10.9 特定テーマA: 有機トランジスター, Aug. 2006
#2006064
Y. Takamatsu, T. Sekitani, S. Nakano, T. Sakurai, and T. Someya, "プラスティック基板上に作製された多結晶ペンタセンFETのホール移動度とその温度依存性（Temperature dependence of Hall mobility using organic FETs manufactured on plastic films）," 秋季第67回応用物理学学術講演会 10.9 特定テーマA: 有機トランジスター, Aug. 2006
#2006065
関谷毅, 高宮真, 桜井貴康, 染谷隆夫, "有機/金属封止膜を用いたペンタセン薄膜トランジスタの大気安定性," 秋季第67回応用物理学学術講演会 10.9 特定テーマA: 有機トランジスター, Aug. 2006
#2006066
野口儀晃, 関谷毅, 中野慎太郎, 桜井貴康, 染谷隆夫, "印刷プロセスによる大面積センサー用の有機トランジスタマトリックス," 秋季第67回応用物理学学術講演会 10.9 特定テーマA: 有機トランジスター, Aug. 2006
#2006067
井上眞梨, 三浦典之, 新津葵一, 中川源洋, 田子雅基, 深石宗生, 桜井貴康, 黒田忠広, "誘導結合型チップ間無線通信における低消費電力デイジーチェーン送信器," 電子情報通信学会技報, ICD2006-79～108, 207, pp.63-68, Aug. 2006
#2006068
高宮真, アーティットタムタカーン, 石黒仁揮, 石田光一, 桜井貴康, "Double Thresholding Schemeを用いた1V 299uW Flashing UWBトランシーバ," 電子情報通信学会技報, ICD2006-89, pp.57-61, Aug. 2006
#2006069
Y. Takamatsu, T. Sekitani, S. Nakano, T. Sakurai, and T. Someya, "Hall effect of polycrystalline pentacene field-effect transistors on plastic films," International Conference on Solid State Devices and Materials (SSDM), Organic Materials Science, Device Physics and Applications, Yokohama, Sep. 11, 2006
#2006070
肖利民, 桜井貴康, "クロックゲーティングを用いたパワーゲーティング," 電子情報通信学会エレクトロニクスソサイエティ大会, 金沢大学, A-03-011, Sep. 21, 2006 (PDF)
#2006071
Atit Tamtrakarn, Hiroki Ishikuro, Koichi Ishida, and Takayasu Sakurai , "Compact outside-rail circuit structure by single-cascode two-transistor topology ," IEEE Custom Integrated Circuits Conference (CICC), pp.619-622, Sep. 2006
#2006072
K. Onizuka, H. Kawaguchi, M. Takamiya, T. Kuroda, and T. Sakurai, "Chip-to-Chip Inductive Wireless Power Transmission System for SiP Applications," IEEE Custom Integrated Circuits Conference, 15.1, pp.575-578, Sep. 2006 (PDF)
#2006073
桜井貴康, "半導体イノベーション立国への道," STARCシンポジウム2006, 新横浜国際ホテル, Sep. 2006
#2006074
T. Sakurai, "Challenges for THE e-life at 2nd A-SSCC," IEEE Solid-state Circuits Society Newsletter, 20, 3, pp.51, Sep. 2006
#2006075
呉文豪, 高宮真, 桜井貴康, "低消費電力VLSI 実現に向けた電源電圧と基板バイアスの動的制御アルゴリズム," 電子情報通信学会エレクトロニクスソサイエティ大会, 金沢大学, C-12-33, Sep. 2006
#2006076
石田将也, 高宮真, 桜井貴康, "非同期サンプリング型UWB受信方式," 電子情報通信学会エレクトロニクスソサイエティ大会, 金沢大学, C-12-39, pp.100, Sep. 2006 (PDF)
#2006077
T. Sekitani, Y. Takamatsu, T. Sakurai, and T. Someya, "Strain and Hall Effects of Pentacence TFTs on Plastic Films," KINKEN Workshop on Organic Field Effect Transistor, Institute for Materials Research, Oct. 2006
#2006078
Y. Noguchi, T. Sekitani, T. Sakurai, and T. Someya, "ROBOT SKINS USING INKJETTED ORGANIC TRANSISTOR ACTIVE MATRICES," Korea-Japan Joint Forum (KJF) 2006 -Organic Materials for Electronics and Photonics-, Organic Display and Transistors, TOKI MESSE, Niigata Convention Center, Oct. 2006
#2006079
T. Someya, T. Sakurai, and T. Sekitani, "Recent Progress of Flexible, Large-area Sensors and Actuators with Organic Transistor Integrated Circuits," KINKEN Workshop on Organic Field Effect Transistor, Institute for Materials Research , Oct. 2006
#2006080
H. Kawaguchi, S. Iba, Y. Kato, T. Sekitani, T. Someya, and T. Sakurai, "A 3D-Stack Organic Sheet-Type Scanner with Double-Wordline and Double-Bitline Structure," IEEE Sensors Journal, Vol.6, No.5, pp.1209-1217, Oct. 2006
#2006081
桜井貴康, "半導体集積回路の課題と展望," アドバンテスト・テクニカル・レポート(Probro　27), Oct. 2006
#2006082
T. Sekitani and T. Someya, "Air-stable operation of pentacene field-effect transistors on plastic films using organic/metal hybrid passivation layers," The 2006 International Symposium on Flexible Electronics and Display (ISFED), Taiwan, Nov. 2006
#2006083
K. Onizuka, H. Kawaguchi, M. Takamiya, and T. Sakurai, "VDD-Hopping Accelerators for On-Chip Power Supply Circuit to Achieve Nanosecond-Order Transient Time," IEEE Journal of Solid-State Circuits, Vol.41, No.11, pp.2382-2389, Nov. 2006 (PDF)
#2006084
T. Sakurai and M. Ikeda, "Introduction to the Special Issue on the 2005 Asian Solid-State Circuits Conference(A-SSCC'05)," IEEE Journal of Solid-State Circuits, Vol.41, No.11, pp.2364-2365, Nov. 2006
#2006085
K. Onizuka, H. Kawaguchi, M. Takamiya, and T. Sakurai, "Stacked-chip Implementation of On-Chip Buck Converter for Power-Aware Distributed Power Supply Systems," IEEE Asian Solid-State Circuits Conference, pp.127-130, Nov. 2006 (PDF)
#2006086
, "家電製品、コードいらず・床や壁に電力伝送シート、東大が開発," 日本経済新聞, Dec. 4, 2006
#2006087
, "電源コードいらない家電が実現？東大が電力シート開発," 読売新聞, Dec. 4, 2006
#2006088
, "電気製品にワイヤレスで電力供給、東大研究チームが開発," 読売新聞, Dec. 4, 2006
#2006089
, "電源コードもはや不要非接触で電力送れるシート開発," 産経新聞, Dec. 4, 2006
#2006090
, "触らなくても電力送れるコンセントが不要に？," 西日本・北海道・京都・福井新聞, Dec. 4, 2006
#2006091
, "触らなくても電力送れる," 日刊福井・佐賀新聞, Dec. 4, 2006
#2006092
, "触らなくても電力送れるコンセントが不要に？," 秋田魁新報, Dec. 4, 2006
#2006093
, "触らなくても電力送れる," 福島民友新聞, Dec. 4, 2006
#2006094
, "触らなくても電力送れるコンセントが不要に？ ," 河北新報, Dec. 4, 2006
#2006095
, "触らなくても電力送れる／コンセントが不要に？ ," 四国・神戸・徳島・中国新聞, 山陰中央新報, Dec. 4, 2006
#2006096
, "電源コードいらず「電源シート」開発東大," 朝日新聞, Dec. 4, 2006
#2006097
桜井貴康, 染谷隆夫, "半導体の近未来、三次元化で新たな領域へ," 日経産業新聞, Dec. 4, 2006
#2006098
M. Takamiya, T. Sekitani, Y. Kato, H. Kawaguchi, T. Someya, and T. Sakurai. , "Flexible Braille Sheet Display with Organic FETs and Plastic Actuators," International Display Workshop (IDW), Otsu, Dec. 8, 2006
#2006099
比津和樹, 関谷毅, 大月穣, 高宮真, 桜井貴康, 染谷隆夫, "有機CMOS論理回路のAC特性," 有機エレクトロニクス(OME)研究会, 機会振興会館, Dec. 2006
#2006100
T. Sekitani, M. Takamiya, Y. Noguchi, S. Nakano, Y. Kato, K. Hizu, H. Kawaguchi, T. Sakurai, and T. Someya, "A Large-Area Flexible Wireless Power Transmission Sheet Using Printed Plastic MEMS Switches and Organic Field-Effect Transistors," 2006　IEEE International Electron Devices Meeting (IEDM2006), San Francisco, Dec. 2006
#2006101
, "触らなくても電力送れる ," 東京新聞, Dec. 2006
#2006102
, "電源コードがなくても送電東大の桜井教授らが開発," 中日新聞, Dec. 2006
#2006103
, "東大、コードなしでも電力送れるシート開発 ," スマートウーマン, Dec. 2006
#2006104
, "触らなくても電力送れる," 東奥日報, Dec. 2006
#2006105
T. Kuroda and T. Sakurai, "Leakage in nanometer CMOS technologies (Chapter 5: Body Biasing)," Springer, pp.105-140, 2006
#2006106
K. Usami and T. Sakurai, "Leakage in nanometer CMOS technologies (Chapter 4: Methodologies for Power Gating)," Springer, pp.77-104, 2006
#2006107
T. Someya, T. Sekitani, S. Iba, Y. Kato, T. Sakurai, and H. Kawaguchi, "Organic transistor integrated circuits for large-area sensors," MOLECULAR CRYSTALS AND LIQUID CRYSTALS, Vol., No., pp.13-22, 2006
#2006108
Danardono Dwi Antono, Kenichi Inagaki, Hiroshi Kawaguchi, and Takayasu Sakurai, "Simple Waveform Model of Inductive Interconnects by Delayed Quadratic Transfer Function with Application to Scaling Trend of Inductive Effects in VLSI's ," IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, E89-A, 12, pp.3569-3578 , 2006 (PDF)
#2006109
D.D. Antono and T.Sakurai, "Modeling and Characterization of Electrical Behaviors of Interconnects in Deep Sub-micron VLSI's," 平成17年度東京大学固体エレクトロニクス・オプトエレクトロニクス研究発表会, 東京大学, 2006
#2006110
野口儀晃, 関谷毅, 福田憲二郎, 竹ノ下賢二, 加藤祐作, 細谷一雄, 松葉頼重, 桜井貴康, 染谷隆夫, "低温焼成型銀ナノ粒子のインクジェット塗布と有機トランジスタへの応用," 2006年(平成18年)春季第53回応用物理学関係連合講演会, 26a-ZG-1, 2006
#2006111
比津和樹, 関谷毅, 島田よう子, 大月穣, 高宮真, 桜井貴康, 染谷隆夫, "ダブルゲート構造を用いた有機CMOS インバータ回路の低電圧駆動," 2006年(平成18年)春季第54回応用物理学関係連合講演会, 26a-ZG-8, 2006
#2006112
関谷毅, 高松泰司, 中野慎太郎, 桜井貴康, 染谷隆夫, "ポリイミドをゲート絶縁膜に用いたペンタセン薄膜トランジスタのキャリア密度," 2006年(平成18年)春季第55回応用物理学関係連合講演会, 2006
#2006113
加藤祐作, 関谷毅, 福田憲二郎, 土井正男, 安積欣志, 高宮真, 桜井貴康, 染谷隆夫, "有機トランジスタと高分子アクチュエータの集積化：シート型点字ディスプレイへの応用," 2006年(平成18年)春季第56回応用物理学関係連合講演会, 2006

2005

#2005001
染谷隆夫, 関谷毅, 伊庭信吾, 加藤祐作, 川口博, 桜井貴康, "有機トランジスタと有機ダイオード光検出器の集積化," 特定領域研究「新しい環境下における分子性導体の特異な機能の探索」第3回シンポジウム, 京都大学, Jan. 17, 2005
#2005002
染谷隆夫, 桜井貴康, 関谷毅, 川口博, "分子性ナノ材料のセンサー応用～有機トランジスタの微細化と集積化技術～," 「量子ドットプロジェクト」研究会, 東京大学　先端科学技術研究センター, Jan. 19, 2005
#2005003
染谷隆夫, 関谷毅, 伊庭信吾, 加藤祐作, 川口博, 桜井貴康, "有機トランジスタ集積回路と大面積エレクトロニクス," 平成16年度第11回材料科学研究科セミナー, 北陸先端科学技術大学院大学, Jan. 25, 2005
#2005004
H. Kawaguchi, T. Someya, T. Sekitani, and T. Sakurai, "Cut-and-Paste Customization of Organic FET Integrated Circuit and Its Application to Electronic Artificial Skin," IEEE Journal of Solid State Circuits, pp.177-185, Jan. 2005 (PDF)
#2005005
鬼塚浩平, 桜井貴康, "低電力VLSIで使用されるオンチップ電源回路の研究 ," 修士論文, 東京大学, Jan. 2005
#2005006
徳永和宏, 桜井貴康, "Multi-VDD, Multi-VTH, サイジンを使ったリーク電力支配世代の低電力スタンダードセルライブラリに関する研究," 修士論文, 東京大学, Jan. 2005
#2005007
許　蛍雪, 桜井貴康, "Research on Block Level Dynamic Approaches　for Low Power in Deep Sub-Micron VLSI Circuit," 修士論文, 東京大学, Jan. 2005
#2005008
石田光一, 桜井貴康, "ユビキタス・エレクトロニクスに向けた低電圧CMOSアナログ集積回路に関する研究," 博士論文, 東京大学, Jan. 2005
#2005009
T. Sekitani, Y. Kato, S. Iba, H. Shinaoka, T. Someya, T. Sakurai, and S. Takagi, "Bending experiment on pentacene field-effect transistors on plastic films," Applied Physics Letters vol. , 86, pp.073511, Feb. 14, 2005
#2005010
染谷隆夫, 関谷毅, 伊庭信吾, 加藤祐作, 川口博, 桜井貴康, "印刷法で作る圧力センサ," 高分子学会講演会, 2005年度印刷・情報記録・表示研究会講座「表示・記録技術を支える材料とプロセスの新展開, 発明会館ホール, Feb. 17, 2005
#2005011
石田光一, 桜井貴康, "ユビキタス・エレクトロニクスに向けた低電圧CMOSアナログ集積回路に関する研究," 平成16年度東京大学固体エレクトロニクス・オプトエレクトロニクス研究発表会, 東京大学, pp.75-80, Feb. 28, 2005
#2005012
N. Miura, D. Mizoguchi, M. Inoue, H. Tsuji, T. Sakurai, and T. Kuroda, "A 195Gb/s 1.2W 3D-Stacked Inductive Inter-Chip Wireless Superconnect with Transmit Power Control Scheme," IEEE International Solid-State Circuits Conference (ISSCC'05), Dig. Tech. Papers, San Francisco, pp.pp.264-265, Feb. 2005 (PDF)
#2005013
H. Kawaguchi, Y. Shin, and T. Sakurai, "μITRON-LP: Power-Conscious Real-Time OS Based on Cooperative Voltage Scaling for Multimedia Applications," IEEE Transaction on Multimedia, 7, pp.67-74, Feb. 2005 (PDF)
#2005014
H. Kawaguchi, S. Iba, Y. Kato, T. Sekitani, T. Someya, and T. Sakurai, "A Sheet-Type Scanner Based on a 3D-Stacked Organic-Transistor Circuit Using Double Word-Line and Bit-Line Structure," IEEE International Solid-State Circuits Conference Digest of Technical Papers, 32.3, pp.580-581, Feb. 2005 (PDF)
#2005015
S. Iba, T. Sekitani, Y. Kato, T. Sakurai, and T. Someya, "Lowering Operation Voltage of Pentacene Field-effect Transistors with Polyimide Gate Dielectric Layers," 3P-C22, Third International Conference on Molecular Electronics and Bioelectronics (M&BE3), National Center of Sciences, Tokyo, Mar. 3, 2005
#2005016
Y. Kato, T. Sekitani, S. Iba, T. Sakurai, and T. Someya, "Manufacturing Process and Characterization of Organic Diode-based Sheet Thermal Sensors," 4O-A09, Third International Conference on Molecular Electronics and Bioelectronics (M&BE3), National Center of Sciences (National Institute of Informatics), Tokyo, Mar. 3, 2005
#2005017
伊庭信吾, 加藤祐作, 関谷毅, 川口博, 桜井貴康, 染谷隆夫, "有機トランジスタと有機光センサーの集積化とシート型イメージスキャナーへの応用," 有機ディスプレイ/有機エレクトロニクス研究会「表示記録用有機材料及びデバイス・一般」, 機械振興会館, Mar. 3, 2005
#2005018
染谷隆夫, 関谷毅, 伊庭信吾, 加藤祐作, 桜井貴康, 川口博, "有機トランジスタ集積回路技術と電子人工皮膚シート," 第32回ニューセラミックスセミナー, 新大阪シティプラザ, Mar. 4, 2005
#2005019
T. Sekitani, S. Iba, Y. Kato, T. Sakurai, and T. Someya,, "Thermal Tolerance of Encapsulated Organic Field-Effect Transistors on Plastic Films," International Symposium on Quantum Dots and Photonic Crystals 2005, Toranomon Pastoral, Toranmon, , 港区, Mar. 7, 2005
#2005020
T. Sakurai, "アンビエント・エレクトロニクスとそのキー・テクノロジー," NECテクノロジーフォーラム, pp.323-341, Mar. 15, 2005
#2005021
Atit Tamtrakarn and T, Sakurai, "3.1-5GHz ultra-wideband architecture and low-power design methodology," 電子情報通信学会　総合大会, Mar. 22, 2005
#2005022
Y. Kato, T. Sekitani, S. Iba, T. Sakurai, and T. Someya, "Temperature Dependence of I-V Characteristics of Organic PN Diodes and Their Application to Sheet Thermal Sensors, H2.9, Material Research Society Spring Meeting, Symposium H," Giant-Area Electronics on Nonconventional Substrates, Mar. 31, 2005
#2005023
Danardono Dwi Antono, 桜井貴康, "On-chip Digital Oscilloscope for Signal Integrity Study," 東京大学21世紀COE「未来を担うエレクトロニクスの展開」平成16年度大学院博士課程学生報告書, 東京大学, pp.10-11, Mar. 2005
#2005024
石田光一, アティットタムタカーン, 桜井貴康, "1.8V CMOSプロセスによる高耐圧オペアンプ," 電子情報通信学会　2005年総合大会講演論文集, pp.13, Mar. 2005 (PDF)
#2005025
T. Sekitani, Y. Kato, S. Iba, T. Sakurai, and T. Someya, "High-Temperature Operation of Pentacene Field-Effect Transistors with Polyimide Gate Insulators," I1.9, Material Research Society Spring Meeting, Symposium I, "Organic Thin-Film Electronics, Mar. 2005
#2005026
石田光一, 桜井貴康, "Outside-Rail出力をもつ高耐圧演算増幅器," 東京大学 21世紀COE 未来社会を担うエレクトロニクスの展開　平成16年度大学院博士課程学生報告書, 東京大学, pp..2-3, Mar. 2005
#2005027
桜井貴康, "あらゆる場所に機能を埋め込む　曲がるデバイス," Nikkei BYTE, pp.56-64, Mar. 2005
#2005028
Danardono Dwi Antono, 桜井貴康, "On-chip Digital Oscilloscope for Signal Integrity Study," 東京大学21世紀COE「未来を担うエレクトロニクスの展開」平成16年度大学院博士課程学生報告書, 東京大学, pp.10-11, Mar. 2005
#2005029
川口博, 伊庭信吾, 加藤祐作, 関谷毅, 染谷隆夫, 桜井貴康, "A Sheet-Type Scanner Based on a 3D-Stacked Organic-Transistor Circuit Using Double Word-Line and Bit-Line Structure," ISSCC2005 報告会, Mar. 2005
#2005030
S. Iba, T. Sekitani, Y. Kato, T. Sakurai, and T. Someya, "Pentacene Field-effect Transistors with 230-nm-thick Polyimide Gate Dielectric Layers," Giant-Area Electronics on Nonconventional Substrrates, Apr. 1, 2005
#2005031
Atit Tamtrakarn and T. Sakurai, "Very low-power Analog/RF circuit design for ubiquitous electronics," 平成17年度　大学院博士課程学生報告書, 東京大学21世紀COE未来エレクトロニクス研究教育センター, pp.12-13, Apr. 21, 2005
#2005032
A. Tantrakarn, 桜井貴康, "Very low-power Analog/RF circuit design for ubiquitous electronics," 東京大学21世紀COE「未来社会を担うエレクトロニクスの展開」平成16年度大学院博士課程学生報告書, 東京大学21世紀COE未来エレクトロニクス研究教育センター, pp.12-13, Apr. 21, 2005
#2005033
T. Sakurai, "How can we achieve Low-Power and High-Performance?," 2005 IEEE Internatiional Confernce on Integrated Circuit and Technology, pp.112, May 10, 2005
#2005034
Canh Quang Tran, H. Kawaguchi, and T, Sakurai, "Low-power High-speed Level Shifter Design for Block-level Dynamic Voltage Scaling Environment," IEEE International Conference on Integrated Circuit Design and Technology, Texas, USA, 1, pp.229-232, May 11, 2005 (PDF)
#2005035
T. Sakurai, "Perspectives of Low-Power Integrated Circuit Design for Ubiquitous Electronics," IT SoC International Symposium, Yonsei Uni., May 13, 2005
#2005036
染谷隆夫, 桜井貴康, 関谷毅, 川口博, "ナノ印刷と有機トランジスタ集積回路技術," 第３回ポリマー光回路研究会(POC)「ナノインプリントと光回路への応用」, （株）豊田中央研究所, May 20, 2005
#2005037
Canh Quang Tran, H. Kawaguchi, and T, Sakurai, "More Than Two orders of Magnitude Leakage Current Reduction in Look-Up Table for FPGA's," IEEE International Symposium on Circuits and Systems, pp.4701-4704, May 2005 (PDF)
#2005038
K. Ishida, K. Kanda, A. Tamtrakarn, H. Kawaguchi, and T. Sakurai, "Subthreshold-Leakage Suppressed Switched Capacitor Circuit Based on Super Cut-Off CMOS (SCCMOS)," IEEE International Symposium on Circuits and Systems, pp.3119-3122, May 2005
#2005039
T. Someya, T. Sekitani, H. Kawaguchi, S. Iba, and Y. Kato, "Recent Advances in Applications of Organic Inergrated Circuits for Large-Area Electronics," 2005 IEEE Internatiional Confernce on Integrated Circuit and Technology, pp.57-62, May 2005
#2005040
三浦典之, 溝口大介, 井上眞梨, 桜井貴康, 黒田忠広, "195Gb/s 1.2W 電力制御機能付き3次元積層型誘導結合無線超配線," 電子情報通信学会技報, 105, 96, pp.pp. 45-50, May 2005 (PDF)
#2005041
桜井貴康, "曲がるスキャナー　有機半導体で開発," 東大は主張する　東京大学新聞社, pp.168, May 2004
#2005042
川口博, 伊庭信吾, 加藤祐作, 関谷毅, 染谷隆夫, 桜井貴康, "二重ワード線と二重ビット線を用いた3次元積層シート型スキャナ," 電子情報通信学会技術研究報告会, ICD2005-23, pp.19-21, May 2005
#2005043
染谷隆夫, "有機トランジスタ集積回路と大規模有機センサ技術の現状と将来展望," 半導体/FPD特別セミナー「有機デバイスの現状と将来展望」, 学士会館, June 21, 2005
#2005044
K. Ishida, K. Kanda, A. Tamtrakarn, H. Kawaguchi, and T. Sakurai, "Managing Leakage in Charge-Based Analog Circuits with Low-VTH Transistors by Analog T- Switch (AT-Switch) and Super Cut-off CMOS," IEEE/JSAP Symposium on VLSI Circuits Digest of Technical Papers, pp.122-125, June 2005 (PDF)
#2005045
Kyu-won Choi, Yingxue Xu, and T. Sakurai, "Optimal zigzag (OZ): an effective yet feasible power-gating scheme achieving two orders of magnitude lower standby leakage," IEEE Symposium on VLSI Circuits, pp.312-315, June 2005
#2005046
F.R. Saliba, H. Kawaguchi, and T. Sakurai, "Experimental verification of row-by-row variable VDD scheme reducing 95% active leakage power of SRAMs," IEEE Symposium on VLSI Circuits, pp.162-165, June 2005
#2005047
T. Someya, T. Sekitani, and T. Sakurai, "(Invited) Mechanical flexibility and high temperature operation of organic field-effect transistors," International Symposium on Molecular Conductors ---- Novel functions of molecular conductors under extreme conditions -Scientific Research on Priority Areas,Japan Shonan Village Center, 葉山, July 17, 2005
#2005048
T. Someya, T. Sakurai, T. Sekitani, H. Kawaguchi, S. Iba, Y. Kato, and Y. Noguchi, "(Invited) Organic transistor integrated circuits for large-area sensors: sheet image scanner and electronic skins," ORGANIC FIELD-EFFECT TRANSISTORS IV, Optics & Photonics, SPIE,, San Diego, California,, July 31, 2005
#2005049
(Invited) T. Someya and T. Sakurai, "Organic transistors for large-area sensor applications," Symposium "Chemistry in Electronics", the Eleventh Asian Chemical Congree (11thACC2005., Korea University, Seou, Aug. 24, 2005
#2005050
T. Someya, Y. Kato, T. Sekitani, S. Iba, Y. Noguchi, Y. Murase, H. Kawaguchi, and T. Sakurai, "Conformable, flexible, large-area networks of pressure and thermal sensors with organic transistor active matrixes," Proceedings of the National Academy of Sciences of the United States of America, , 102, Issue 35, pp.12321-12325, Aug. 30, 2005 (PDF)
#2005051
N. Miura, D. Mizoguchi, T. Sakurai, and T. Kuroda, "Analysis and Design of Inductive Coupling and Transceiver Circuit for Inductive Inter-Chip Wireless Superconnect," IEEE Journal of Solid-State Circuits (JSSC), 40, 4, pp.pp. 829-837, Aug. 2005 (PDF)
#2005052
伊庭信吾, 関谷毅, 加藤祐作, 高木信一, 桜井貴康, 染谷隆夫, "ダブルゲート構造による有機トランジスタの閾値電圧制御," 第66回応用物理学会学術講演会, 徳島大学, Sep. 9, 2005
#2005053
野口儀晃, 関谷毅, 伊庭信吾, 加藤祐作, 桜井貴康, 染谷隆夫, "ポリイミドのインクジェット塗布と有機トランジスタへの応用," 第66回応用物理学会学術講演会, 徳島大学, Sep. 9, 2005
#2005054
Atit Tamtrakarn, K. Ishida, and T. Sakurai, "A 20% Power Reduction in Two-stage Opamp by Source-Degenerated Active-Load Phase Compensation," Solid State Devices and Materials, Sep. 14, 2005
#2005055
Atit Tamtrakarn and T. Sakurai, "Wideband Low Noise Amplifier for 80-960MHz Ultra-wideband Transceiver," 電子情報通信学会　ソサイティ大会, Sep. 21, 2005
#2005056
野口儀晃, 関谷毅, 伊庭信吾, 加藤祐作, 比津和樹, 桜井貴康, 染谷隆夫, "低温硬化ポリイミドをゲート絶縁膜とした有機トランジスタ－DC 特性, 耐熱性, 屈曲試験, 印刷」, ," 2Q08, シンポジウム「有機エレクトロニクス材料の合成・電子・光機能」, 第54回高分子討論会, , 山形大学　小白川キャンパス, Sep. 21, 2005
#2005057
中村安見, 桜井貴康, "高圧電源を使用した電源ノイズの低減," 電子情報通信学会ソサイエティ大会, C-12-19, Sep. 22, 2005
#2005058
T. Sakurai, "Advances and Pespectives on Low-power Integrated Circuits for Ubiquitous Electronics," The 21st Century COE in Electrical Engineering and electronics for the Active and Creative World, 東京大学, pp.93-98, Oct. 11, 2005
#2005059
(Invited) T. Someya, T, Sakurai, T. Sekitani, H. Kawaguchi, Y, Kato, and S. Iba, "Pocket Scanner using Organic Transistors and Detectors," IEEE Lasers and Electro-Optics Society, Sydney, Australia, Oct. 23, 2005
#2005060
T. Sakurai, "Moore's Law plus-What will be needed in interconnects, othe than scaling, from an applications perspective?," Twenty second International VLSI multilevel interconnection conference, 東京大学, pp.19, Oct. 30, 2005
#2005061
T. Someya, T. Sekitani, Shi. Iba, Y. Kato, Y. Noguchi, K. Hizu, and T. Sakurai, "(Invited) Conformable electronic artificial skins with organic transistor integrated circuits," Korea-Japan Joint Forum(KJF) 2005 on Organic Materials for Electronics, Daejeon, Korea, Oct. 26-29, 2005
#2005062
K. Onizuka and T. Sakurai, "VDD-Hopping Accelerator for On-Chip Power Supplies Achieving Nano-Second Order Transient Time," IEEE Asian Solid-State Circuits Conference, Hsinchu, Taiwan, Session6-1, pp.145-148, Nov. 2, 2005 (PDF)
#2005063
Canh Quang Tran, H. Kawaguchi, and T, Sakurai, "95% Leakage-Reduced FPGA using Zigzag Power-gating, Dual-VTH/VDD and Micro-VDD-Hopping," IEEE Asian Solid-State Circuits Conference, Hsinchu, Taiwan, 6, pp.149-152, Nov. 2, 2005 (PDF)
#2005064
桜井貴康, 黒田忠広, "半導体集積回路装置," 第2回　P&Iパテントコンテスト　パテント・オブ･ザ・イヤー, 一ツ橋メモリアルホール, Nov. 8, 2005
#2005065
S. Iba, Y. Kato, T. Sekitani, H. Kawaguchi, T. Sakurai, and T. Someya, "Use of laser drilling in the manufacture of organic inverter circuits," Analytical and Bioanalytical Chemistry, 384, pp.374 - 377, Nov. 11, 2005
#2005066
Kyu-won Choi, Y. Xu, K. Inagaki, and T. Sakurai, "Optimal zigzag scheme achieving lower standby leakage," International Symposium on Quantum Dots and Nanoelectronics, Tokyo Garden Place, Nov. 18, 2005
#2005067
桜井貴康, "低消費電力設計の最近の動向," Low-Powerデザインセミナー2005, 飯田橋, Nov. 28, 2005
#2005068
T. Someya, Y. Kato, S. Iba, Y. Noguchi, T. Sekitani, H. Kawaguchi, and T. Sakurai , "Integration of organic FETs With Organic Photodiodes for a Large Area, Flwxible, and Lightweight Sheet Image Scanners," IEEE Transactions on Electron Devices, 52, 11, pp.2502-2511, Nov. 2005 (PDF)
#2005069
K. Ishida, A. Tamtrakarn, H. Ishikuro, and T. Sakurai, "An Outside-Rail Opamp Design Targeting for Future Scaled Transistors," 2005 IEEE Asian Solid-State Circuits Conference, pp.73-76, Nov. 2005
#2005070
T. Someya, T. Sakurai, and T. Sekitani, "(Invited) Flexible, Large-Area Sensors and Actuators with Organic Transistor Integrated Circuits," IEEE International Electron Devices Meeting, Washington, DC, Dec. 5, 2005
#2005071
Y. Kato, S. Iba, T.Sekitani, Y. Noguchi, K. Hizu, X. Wang, K. Takenoshita, Y. Takamatsu, S. Nakano, K. Fukuda, K. Nakamura, T. Yamaue, M. Doi, K.. Asaka, H. Kawaguchi, M. Takamiya, T. Sakurai, and T. Someya, "A flexible, lightweight Braille sheet display with plastic actuators driven by an organic field-effect transistor active matrix," IEEE International Electron Devices Meeting, Washington, DC, Dec. 5, 2005
#2005072
T. Someya, T. Sakurai, T. Sekitani, H. Kawaguchi, Y. Kato, and S. Iba, "(Invited) A Sheet Image Scanner with Organic Transistor Integrated Circuits," 2005 International Display Workshops (IDW/AD’05), 高松, Dec. 6, 2005
#2005073
Kyeong-Sik Min, Kouichi Kanda, Hiroshi Kawaguchi, Kenichi Inagaki, Fayez Robert Saliba, Hoon-Dae Choi, Hyun-Young Choi, Daejeong Kim, Dong Myong Kim, and Takayasu Sakurai, "Row-by-Row Dynamic Source-Line Voltage Control (RRDSV) Scheme for Two Orders of Magnitude Leakage Current Reduction of Sub-1-V-VDD SRAM's," IEICE Transactions on Electronics, E88-C, 4, pp.760-767, 2005
#2005074
T. Sekitani, S. Iba, Y. Kato, Y. Noguchi, T. Someya, and T. Sakura, "Ultra-flexible organic field-effect transistors embedded at a neutral strain position," Applied Physics Letters 87, pp.173502, 2005 (PDF)
#2005075
T. Sekitani, S. Iba, T. Sekitani, Y. Kato, T. Someya, and T. Sakurai, "Suppression of DC bias stress-induced degradation of organic field-effect transistors using postannealing effects ," Applied Physics Letters 87, pp.073505 , 2005 (PDF)
#2005076
S. Iba, T. Sekitani, Y. Kato, T. Someya, H. Kawaguchi, M. Takamiya, T. Sakurai, and S. Takagi, "Control of threshold voltage of organic field-effect transistors with double-gate structures," Applied Physics Letters 87, pp.023509 ., 2005 (PDF)
#2005077
T. Sekitani, Y. Kato, S. Iba, and T. Someya, "Bending Effect of Organic Field-Effect Trasistors with Polyimide Gate Dielectric Layers," Japanese Journal of Applied Physics, 44, pp.2841-2844, 2005 (PDF)
#2005078
黒田忠広, "Leakage in Nanometer CMOS Technologies (Chapter 4: Body Biasing),," Springer Science+Business Media, Inc., ISBN 0-3872-5737-3, 2005
#2005079
Y. Noguchi, T. Sekitani, Y. Kato, S. Iba, T. Sakurai, and T. Someya, "Inkjet Printing of Polyimide Precursors and Its Application to Organic Field-Effect Transistors," 2005 MRS Fall Meeting, Hynes Convention Center and Sheraton Boston Hotel, Boston, 2005., Massachusetts, 2005
#2005080
T. Sekitani, S. Iba, Y. Kato, Y. Noguchi, T. Sakurai, and T. Someya, "Organic Field-Effect Transistors with Suppressed DC Bias-Stress Degradations," 2005 MRS Fall Meeting, Hynes Convention Center and Sheraton Boston Hotel, Boston, 2006., Massachusetts, 2005
#2005081
T. Someya, T. Sakurai, T. Sekitani, H. Kawaguchi, S. Iba, and Y. Kato, "(Invited) Recent Advances in Applications of Organic Integrated Circuits for Large-Area Electronics," International Conference on IC Design and Technology, Austin, TX, 2005
#2005082
関谷毅, 伊庭信吾, 加藤祐作, 桜井貴康, 染谷隆夫, "フレキシブル有機トランジタの電気伝導特性における圧縮・伸張歪みの効果," 材料デバイスサマーミーティング, 有機エレクトロニクス研究会, 機械振興会館, 2005
#2005083
染谷隆夫, 桜井貴康, 川口博, 関谷毅, 伊庭信吾, 加藤祐作, 野口儀晃, 村瀬洋介, "「有機材料採用で曲げられるスキャナー：回路技術で市販並み高性能を実現," 日経エレクトロニクス, 2月28日号, pp.123-132, 2005
#2005084
T. Sekitani, S. Iba, Y, Kato, Y. Noguchi, T, Sakurai, and T. Someya, "SUBMILLIMETER RADIUS BENDABLE ORGANIC FIELD-EFFECT TRANSISTORS," The 21st International Conference on Amorphous and Nanocrystalline Semiconductors (ICANS 21), Calouste Gulbenkian Foundation,, Portugal, Lisbon, 2005
#2005085
桜井貴康,"シート状スキャナは世界をどう変えるのか？“線”ではなく“面”で観るスキャナ！,"月刊アスキー, 2月号, No.332, 2005
#2005086
桜井貴康,"シート型スキャナの開発　有機半導体でスキャナを開発　スキャナのモバイル化も実現,"　Electronic Journal, p.76, 1月号, 2005
#2005087
桜井貴康,"ソフトとハードの連携を強化　回路設計の自由度を向上," 日経マイクロデバイス, pp.80-81, Aug. 2005
#2005088
桜井貴康,"リーク電流はこう抑える（6）基板バイアス電圧を用いた可変しきい値電圧制御で低減,”日経エレクトロニクス2005年4月11日号, pp.120-126, 2005
#2005089
桜井貴康,"（特別講演)ユビキタス・エレクトロニクスに向けた低消費電力設計技術と有機トランジスタ回路," 半導体技術ロードマップ専門委員会第一部『ITRS 2004 Updateに見る今後のLSI技術の方向性』, pp.3C-1-3C-21, Mar.3, 2005

2004

#2004001
T. Someya and T. Sakurai, "Electronic skin senses touch," Science News, 165, pp.45, Jan. 17, 2004

#2004002
T. Miyazaki and T, Sakurai, "Research on Low-Power VLSI Circuit Design for Ubiquitous Electronics," 修士論文, 東京大学, Feb. 9, 2004

#2004003
T. Sakurai, "Adaptive Circuit Techniques for Managing Variations," IEEE International Solid-State Circuits Conference Digest of Technical Papers, U.S.A., Feb. 19, 2004 (PDF)

#2004004
染谷隆夫, 桜井貴康, "表紙「皮膚感覚を持つ等身大ロボット」," NEW MEDIA, 創刊20年+2号, pp.表紙, Feb. 2004

#2004005
桜井貴康, "オピニオンリーダーの持論を知る," 月刊PC－Webmagazine, 144, pp.84, Feb. 2004

#2004006
桜井貴康, "2010年有機トランジスタ　新アプリが現実に," Nikkei MICRODEVICES, 224, 2, pp.46-47, Feb. 2004

#2004007
染谷隆夫,　桜井貴康, "くにゃくにゃ曲がるロボット用の皮膚," ネイチャーインターフェース, 19, pp.91, Feb. 2004

#2004008
T. Someya, H. Kawaguchi, and T. Sakurai, "Cut-and-Paste Organic FET Customized ICs for Application to Artificial Skin," IEEE International Solid-State Circuits Conference Digest of Technical Papers, U.S.A., Feb. 2004 (PDF)

#2004009
D. Mizoguchi, Y. Yusof, N. Miura, T. Sakurai, T. Kuroda, "A 1.2Gb/s/pin Wireless Superconnect Based on Inductive Inter-Chip Signaling," IEEE International Symposium on Quality Electronic Design, U.S.A., Session7-6, Feb. 2004 (PDF)

#2004010
T. Sakurai, "Perspectives in Power-Aware and Large-Area Integrated Circuits for Ubiquitous Electronics," International Symposium on Electronics for Future Generations, Tokyo, pp.71-74, Mar. 10, 2004 (PDF)

#2004011
T. Someya and T. Sakurai, "Flexible, Large-Area sensor Matrix with Organic Taransistor-Based Circuits," 3rd International Symposium on Organic Molecular Electronics (ISOME2004) , Kyoto, Mar. 18, 2004 (PDF)

#2004012
石田光一, 桜井貴康, "負バイアス制御スイッチを用いた高精度スイッチキャパシタ回路," 東京大学21世紀COE「未来を担うエレクトロニクスの展開」平成15年度大学院博士課程学生報告書, 東京大学, pp.2-3, Mar. 2004 (PDF)

#2004013
チャン・クワン・カイン, 桜井貴康, "FPGAの低消費電力化に関する研究," 東京大学21世紀COE「未来を担うエレクトロニクスの展開」平成15年度大学院博士課程学生報告書, 東京大学, pp.4-5, Mar. 2004 (PDF)

#2004014
Danardono Dwi Antono, 桜井貴康, "Signal Integrity in Deep Submicron VLSI Interconnects," 東京大学21世紀COE「未来を担うエレクトロニクスの展開」平成15年度大学院博士課程学生報告書, 東京大学, pp.6-7, Mar. 2004 (PDF)

#2004015
Atit Tamtrakarn, 桜井貴康, "Low-power short-range wireless RF transceiver systems for sensor network applications," 東京大学21世紀COE「未来を担うエレクトロニクスの展開」平成15年度大学院博士課程学生報告書, 東京大学, pp.8-9, Mar. 2004 (PDF)

#2004016
T. Someya, H.Kawaguchi, and T.Sakurai, "Cut-and-Paste Organic FET Customized ICs for Application to Artificial Skin," ISSCC2004報告会, 東京大学, Mar. 17, 2004

#2004017
T. Sakurai, "Perspective of Power-Aware Electronics," IEEE Distinguished Lecturer Program in Taiwan, Taiwan, Mar. 2004

#2004018
桜井貴康, "部品の個性を生かし性能向上, 歩留まり改善," 日経エレクトロニクス, 870, pp.120-129, Mar. 29, 2004

#2004019
伊庭信吾, 加藤祐作, 関谷毅, 川口博, 桜井貴康, 染谷隆夫, "レーザードリル加工を用いた有機トランジスタのインバータ回路," 春季第51回応用物理学関係連合講演 , 東京工科大学, 28p-ZN-3, Mar. 2004

#2004020
関谷毅, 伊庭信吾, 加藤祐作, 川口博, 桜井貴康, 染谷隆夫, "有機トランジスタの新しい応用を拓くフレキシブル大面積センサー," 春季第51回応用物理学関係連合講演 , 東京工科大学, 28p-ZN-14, Mar. 2004

#2004021
加藤祐作, 伊庭信吾, 寺本亮平, 関谷毅, 川口博, 桜井貴康, 染谷隆夫, "低温硬化ポリイミドをゲート絶縁膜に用いたペンタセン電界効果トランジスタ," , 東京工科大学, 28p-ZN-15, Mar. 2004

#2004022
桜井貴康, "LSIシステムの課題と新しいアプリケーション," 会, pp.23-51, Apr. 7, 2004

#2004023
桜井貴康, "しきい値電圧の低減が限界　回路技術が道を開く," 日経エレクトロニクス, 872, pp.110-127, Apr. 26, 2004

#2004024
染谷隆夫, 桜井貴康, 川口博, 関谷毅, "有機トランジスタの新しい応用を拓くフレキシブル大面積センサ," 応用物理, 第73巻, 第5号, 2004

#2004025
T. Sekitani, H. Kawaguchi, T. Sakurai, and T. Someya, "Organic field-effect transistors with bending radius down to 1 mm," 2004 Materials Research Society (MRS) Spring Meeting, USA(SF), Apr. 2004 (PDF)

#2004026
H. Kawaguchi, T. Someya, T. Sekitani, and T. Sakurai, "Cut-and-Paste Customization of Organic FET Integrated Circuit and Its Application to Electronic Artificial Skin," IEEE Journal of Solid State Circuits, Vol., No., Apr. 2004 (PDF)

#2004027
T. Sakurai, "Perspectives of Low-Power VLSI's," IEICE Transactions on Electronics, E87-C, 4, pp.429-437, Apr. 2004 (PDF)

#2004028
Y. Kato, S. Iba, R. Teramoto, T. Sekitani, and T. Someya, "High mobility of pentacene field-effect transistors with polyimide gate dielectric layers," Applied Physics Letters, May 10, 2004

#2004029
T.Sakurai, "Perspectives of Low Power Electronics ," 2004 Internasional Confernce on Integrated Circuit Design and Technology, Austin, Texas, pp.1-147, May 17, 2004

#2004030
S.Iba, Y.Kato, T.Sekitani, T.Someya, H.Kawaguchi, and T.Sakurai, "Organic inverter circuits with via holes formed by CO2 laser drill machine," Applied Physics Letters, May 2004

#2004031
桜井貴康, "ローパワーLSI技術とローパワーが拓く世界," SEMI FORUM JAPAN 2004, 大阪, pp.1-21, June 17, 2004

#2004032
桜井貴康, "「スーパーコネクト」の狙い、現状、将来展望について," Q&A エレクトロニクスと高分子, pp.40-41, June 2004 (PDF)

#2004033
染谷隆夫,　関口毅, 川口博, 桜井貴康, "有機トランジスタの大面積センサー応用," 固体物理, 39, 460, pp.77-83, June 2004 (PDF)

#2004034
桜井貴康, "システム・イン・パッケージとスーパーコネクトへの期待," 実装技術ガイドブック2004（工業調査会）, 7月号, 別冊, pp.2, July 2004

#2004035
T. Kuroda and T. Sakurai, "Overview of Low-Power ULSI Circuit Techniques," HIGH-PERFORMANCE SYSTEM DESIGN, pp.198-207, 2004

#2004036
十山　圭介, 三坂　智, 相坂　一夫, 在塚　俊之, 内山　邦男, 石橋　孝一郎, 川口　博, 桜井　貴康, "CPU消費電力削減のための周波数-電圧協調型電力制御方式の設計ルールとフィードバック予測方式による適用," 電子情報通信学会論文誌, J87-D-I , 4, pp.452-461, Apr. 2004

#2004037
H. Kawaguchi, Y. Shin, and T. Sakurai, "μITRON-LP: Power-Conscious Real-Time OS Based on Cooperative Voltage Scaling for Multimedia Applications," IEEE Transaction on Multimedia, Vol., No., 2004 (PDF)

#2004038
T. Someya, T. Sekitani, S. Iba, Y. Kato, H. Kawaguchi, and T. Sakurai, "A Large-Area, Flexible Pressure Sensor Matrix with Organic Field-Effect Transistors for Artificial Skin Applications," , 2004 (PDF)

#2004039
T. Sakurai and T. Someya, "Expectations for Organic Transistor IC's and Large-Area Electronics," EXTENDED ABSTRACTS OF THE 23red ELECTRONIC MATERIALS SYMPOSIUM, 伊豆長岡, K2, pp.297-300, July 7, 2004

#2004040
K. Kanda, S. Hattori, and T. Sakurai, "90% write power-saving SRAM using sense-amplifying memory cell," IEEE J. Solid-State Circuits, Vol.39, No.6, pp.927-933, Jan. 2004 (PDF)

#2004041
桜井貴康, "基調講演　微細化で見えてきたLSI設計の技術的課題," 第13回半導体プロセスシンポジウム, pp.8-33, Sep. 16, 2004

#2004042
Fayez R. Saliba, and T. Sakurai, "Low-Voltage Low-Power SRAM and Flip-Flop Design for Deep-Submicron VLSI's," 修士論文, 東京大学, Aug. 23, 2004

#2004043
T. Sakurai, "Low Power Digital Circuit Design," European Solid-State Circuits Conference, Leuven, Belgium, Sep. 21-23, 2004 (PDF)

#2004044
染谷隆夫、桜井貴康, "有機トランジスタ集積回路と大面積エレクトロニクス," 第65回応用物理学会学術講演会シンポジウム「有機トランジスタ－－実用化は見えてきたか, 東北大学, Sep. 2004 (PDF)

#2004045
T.Someya, T.Sakurai, T.Sekitani, H.Kawaguchi, S.Iba, and Y.Kato, "Organic transistor ICs for large-area sensors," Korea Japan Joint Forum 2004 , Okinawa, Nov. 3, 2004 (PDF)

#2004046
染谷隆夫，桜井貴康, "有機トランジスタを用いた大面積センサー集積回路技術," 応用物理学会関西支部シンポジウム , 大阪, Nov. 26, 2004

#2004047
桜井貴康, "産学連携を成功させるもう一つの方法," 日経エレクトロニクス/日経マイクロデバイス/日経ものづくり合同企画, 学生向け特別編集版, pp.41-42, 2004 (PDF)

#2004048
染谷隆夫, 桜井貴康, "有機トランジスタ集積回路と大面積エレクトロニクス," 工業調査会　国際技術情報誌, 12月号, pp.172-178, Dec. 2004

#2004049
Canh Q. Tran, Takayasu Sakurai, "低電圧対応のレベルコンバータ," 電子情報通信学会2004年総合大会, 東京工業大学, A-1-8, pp.8, Mar. 22, 2004 (PDF)

#2004050
宮崎隆行, ダナルドノ　ドゥイ　アントノ, 石田光一, 桜井貴康, "標準CMOSプロセスを用いた音波発生デバイス," 2004年電子情報通信学会総合大会, 東京, A-1, pp.17, Mar. 22, 2004

#2004051
染谷　隆夫，川口　博，桜井　貴康, "Cut-and-Paste Organic FET Customized ICs for Application to Artificial Skin," 電子情報通信学会技術研究報告, May 2004

#2004052
Atit Tamtrakarn, Takayasu Sakurai, "Medium-loss considerations for designing an ultra-wideband transceiver," 電子情報通信学会2004年ソサエティ大会, ISSN 1349-144X, A-1, pp.17, Sep. 8, 2004 (PDF)

#2004053
徳永和宏　桜井貴康, "Dual-VTH, dual-VDD, dual-Wを使った低消費電力ライブラリに関する考察," STARCシンポジウム2004, 新横浜国際ホテル, Sep. 9,

#2004054
桜井貴康, "リーク電流はこう抑える（1）電流値の2ケタ削減が急務　回路技術の総投入で実現," 日経エレクトロニクス, 9-13号, pp.154-161, Sep. 13, 2004

#2004055
鬼塚浩平桜井貴康, "インダクティブカップリングによる電力伝送回路最適化に関する一考察," 電子情報通信学会 2004年基礎・境界ソサイエティ大会, 徳島, A-1-3, pp.3, Sep. 21, 2004 (PDF)

#2004056
石田光一, 桜井貴康, "低しきい値デバイスを用いた低電圧駆動アナログ回路," 2004年電子情報通信学会ソサエティ大会, 徳島, A-1, pp.11, Sep. 21, 2004

#2004057
Kwu-Won Choi, Yingxue Xu, Takayasu Sakurai, "Power-Gating Switch Revisited: A Fine-Grain Optimization for Leakage-Aware CMOS Circuits," 2004年電子情報通信学会基礎・境界ソサイエティ大会, 徳島大学, A-3-6, pp.pp.61, Sep. 23, 2004 (PDF)

#2004058
桜井貴康, "リーク電流はこう抑える（2）実現化進むデュアルVthやサイジングデュアルVddの課題はコスト," 日経エレクトロニクス, 9-27号, pp.136-143, Sep. 27, 2004

#2004059
Jin-Hyeok Choi, Yingxue Xu, Takayasu Sakurai, "Statistical Leakage Current Reduction in High-Leakage Environments Using Locality of Block Activation in Time Domain," IEEE Journal of Solid-State Circuits, Vol.Vol.37, No.No.9, pp.pp.1497-1503, Sep. 2004 (PDF)

#2004060
徳永　和宏，川口　博，桜井　貴康, "VLSI設計におけるDual VDD回路の電力削減効果," 電子情報通信学会ソサイエティ大会, Sep. 2004

#2004061
桜井貴康, "リーク電流はこう抑える（3）待機時のリーク電流はパワー・ゲーティングで減らす," 日経エレクトロニクス, 10-11号, pp.138-144, Oct. 11, 2004

#2004062
桜井貴康, "リーク電流はこう抑える（4）+0.7Vの低電圧に対応可能な新型パワー・ゲーティング技術が登場," 日経エレクトロニクス, 10-25号, pp.156-163, Oct. 25, 2004

#2004063
T. Miyazaki, T. Q. Canh, H. Kawaguchi, and T. Sakurai, "Observation of one-fifth-a-clock wake-up time of power-gated circuit," Proceedings of IEEE Custom Integrated Circuits Conference, pp.pp. 87-90, Oct. 2004 (PDF)

#2004064
染谷　隆夫，桜井　貴康，関谷　毅，伊庭　信吾，加藤　祐作，川口　博, "ユビキタス時代に期待される有機トランジスタ集積回路技術とフォトン," 京都ナノテククラスターフォトニックセミナー, Dec. 2004

#2004065
T. Someya, T. Sakurai, T. Sekitani, H. Kawaguchi, S. Iba, and Y. Kato," , , . 2004., "A Large-Area, Flexible, and Lightweight Sheet Image Scanner," IEEE International Electron Devices Meeting Digest of Technical Papers, #15.1, Dec. 2004

#2004066
T. Sakurai, "Perspectives of Low Power Electronics," 2004 IEEE International Confernce on Semiconductor Electronics, Kuala Lumpur, ⅢB(Parameswara Ⅱ, level2), Dec. 2004

#2004067
染谷隆夫，桜井貴康，川口博，関谷毅, "有機トランジスタの新しい応用を拓くフレキシブル大面積センサー," 応用物理, 73（5）, pp.610-614, Mar. 2004 (PDF)
#2004068
染谷隆夫，桜井貴康,"有機トランジスタ集積回路技術と大面積エレクトロニクス, " 「Ｍ＆Ｅ」12月号, pp.172-178, 2004
#2004069
桜井貴康,"曲がるフィルム状スキャナを試作　光学系や機械部品が不要に," 日経マイクロデバイス2005年新春号, p.5, 2004

2003

#2003001
桜井貴康, "最先端システムLSIの現状と課題," 電子・情報技術ワークショップ, pp.38-55, Jan. 14, 2003

#2003002
桜井貴康, "本音で語る今後の半導体技術戦略," サイエンスフォーラム, 後楽園会館, pp.Ⅲ.1.1－Ⅲ1.6, Jan. 16, 2003

#2003003
H. Kawaguchi, K. Kanda, K. Nose, S. Hattori, D. D. Antono, D. Yamada, T. Miyazaki, K. Inagaki, T. Hiramoto, and T. Sakurai, "A 0.5-V, 400-MHz, VDD-Hopping Processor with Zero-VTH FD-SOI Technology," IEEE International Solid-State Circuits Conference Digest of Technical Papers, pp.106-107, Feb. 2003 (PDF)

#2003004
K. Kanda, D. D. Antono, K. Ishida, H. Kawaguchi, T. Kuroda, and T. Sakurai, "1.27-Gbps/pin, 3mW/pin Wireless Superconnect (WSC) Interface Scheme," IEEE International Solid-State Circuits Conference Digest of Technical Papers, pp.186-187, Feb. 2003 (PDF)

#2003005
K. Min, H. Kawaguchi, T. Sakurai, "Zigzag Super Cut-off CMOS (ZSCCMOS) Block Activation with Self-Adaptive Voltage Level Controller: An Alternative to Clock-Gating Scheme in Leakage Dominant Era," IEEE International Solid-State Circuits Conference Digest of Technical Papers, pp.400-401, Feb. 2003 (PDF)

#2003006
Danardono Dwi Antono, Takayasu Sakurai, "Power Consumption Distribution in DSM Interconnects with Inductive Effects," 電子情報通信学会総合大会, 東北大学, A-3-15, pp.82, Mar. 20, 2003 (PDF)

#2003007
川口　博, 神田　浩一, 野瀬　浩一, 服部　貞昭, ダナルドノ　ドゥイ　アントノ, 山田　大裕, 宮崎　隆行, 稲垣　賢一, 平本　俊郎, 桜井　貴康, "A 0.5-V, 400-MHz, VDD-Hopping Processor with Zero-VTH FD-SOI Technology," ISSCC2003報告会, Mar. 2003

#2003008
桜井貴康, "回路設計技術の最新動向," システムLSI技術に関する調査報告書, pp.66-82, Mar. 2003

#2003009
T. Sakurai, "Opportunities of Japanese Semiconductor Industry," ING Technical Seminar, Japan, pp.34, Apr. 22, 2003

#2003010
S. Misaka, K. Toyama, T. Aritsuka, K. Uchiyama, K. Aisaka, H. Kawaguchi, and T. Sakurai, "Frequency-Voltage Cooperative Power Reduction for Multi-tasking Multimedia Applications," International Symposium on Low-Power and High-Speed Chips (COOL Chips), Apr. 2003

#2003011
神田　浩一, ダナルドノ　ドゥイ　アントノ, 石田　光一, 川口　博, 黒田　忠広, 桜井　貴康, "1.27Gb/s/pin, 3mW/pin Wireless Superconnect (WSC) Interface Scheme," 電子情報通信学会技術研究報告, ICD2003-16, pp.19-22, May 2003 (PDF)

#2003012
川口　博, 神田　浩一, 野瀬　浩一, 服部　貞昭, ダナルドノ　ドゥイ　アントノ, 山田　大裕, 宮崎　隆行, 稲垣　賢一, 平本　俊郎, 桜井　貴康, "A 0.5V, 400MHz, VDD-Hopping Processor with Zero-VTH FD-SOI Technology," 電子情報通信学会技術研究報告, ICD2003-35, pp.55-58, May 2003 (PDF)

#2003013
T. Sakurai, "Low Power Circuits and Techniques," IEEE Custom Integrated Circuits Conference, USA(San Jose), 28, May 2003

#2003014
桜井貴康, "LSIの新境地を拓くスーパーコネクト," 化学工業社, 48, 6, pp.48-52, June 1, 2003

#2003015
T. Sakurai, "Three big hedaches in 90 nm and below including Power-Aware Electronics ," Sequence Technology Summit 2003, Sequence, pp.10, June 1, 2003

#2003016
川口　博, 神田　浩一, 野瀬　浩一, 服部　貞昭, Danardono Dwi Antono, 山田　大裕, 宮崎　隆行, 稲垣　賢一, 平本　俊郎, 桜井　貴康, "IP賞：ゼロVTH, FD-SOIを用いた低電力高速VDDホッピングプロセッサ," LSI IPデザイン・アワード運営委員会, June 10, 2003

#2003017
T. Sakurai, "システムLSIの課題と展望," SONY特別講演, 大崎, June 18, 2003

#2003018
T. Sakurai, "システムインパッケージとスーパーコネクトへの期待," 電子実装工学研究所（IMSI)総会, June 28, 2003

#2003019
T. Sakurai, "Reshaping EDA for Power," Design Automation Conference, USA(Anaheinm), 2, June 2003

#2003020
桜井貴康, "基調講演　SOC設計の課題と異業種連携によるソリューション," SoC設計技術フォーラム2003, 新横浜, pp.1-24, July 3, 2003

#2003021
桜井貴康, "半導体を牽引するマーケットと技術-65nmLSIへの期待-," 第20期：第1回JSTフォーラム, pp.1.1-1.18, July 14, 2003

#2003022
桜井貴康, "到来するユビキタス・ネットワーク社会-65nmLSIが拓く新しい世界," サイエンスフォーラム, 後楽園会館, pp.109, July 14, 2003

#2003023
宮崎　隆行, 閔　庚湜, 川口　博, 桜井貴康, "デジタル家電に向けた低リーク電力デジタル回路技術 -Zigzag SCCMOS scheme-," 電子情報通信学会技術研究報告, ICD2003-39, pp.1-6, July 2003

#2003024
三坂　智, 十山　圭介, 在塚　俊之, 内山　邦男, 相坂　一夫, 川口　博, 桜井　貴康, "マルチタスク実装マルチメディアに対する周波数-電源電圧協調型電力制御," 電子情報通信学会技術研究報告, ICD2003-40, pp.7-12, July 2003

#2003025
桜井貴康, "動作時リーク削減　回路からソフトまで連携," 日経マイクロデバイス特別編集版, pp.73-79, Aug. 2003

#2003026
宮崎隆行, 桜井貴康, "リークを低減するzigzag CMOSの検討," STARCシンポジウム2003, 千里, Sep. 11, 2003

#2003027
T.Someya,T. Sakurai, "Integration of Organic Filed-Effect Transistors and Rubbery Presssure Senso for Artificial Skin Applications," IEEE International Electron Devices Meeting, USA(Washington), pp.8.4.1-8.4.4, Sep. 12, 2003 (PDF)

#2003028
T. Sakurai, "For The LAST Time, Who Is Going To Solve The POWER Problem!," IEEE International Electron Devices Meeting, USA(Washington), 24, Sep. 12, 2003

#2003029
染谷隆夫, 桜井貴康, "有機トランジスタと回路技術（招待講演）," NPOサーキットネットワーク定例会合,, 回路会館　東京, Sep. 19, 2003

#2003030
Fayez Robert Saliba, Takayasu Sakurai, "Low-Energy Flip-Flops Using Transistor Stack Effect," 電子情報通信学会ソサイエティ大会, 新潟大学, A-3. VLSI 設計技術, Sep. 23, 2003

#2003031
Yingxue Xu, Takayuki Miyazaki, Hiroshi Kawaguchi, Takayasu Sakurai, "Fast Block-Wise VDD-Hopping Scheme," 電子情報通信学会2003年ソサイエティ大会, 新潟大学, A-3-11, Sep. 23, 2003 (PDF)

#2003032
徳永和宏, 宮崎隆行, 桜井貴康, "低電力・ライブラリ･セルの選択に関する一検討," 電子情報通信学会基礎・境界ソサイエティ大会, 新潟大学, A-3-8, pp.58, Sep. 23, 2003

#2003033
鬼塚浩平, 桜井貴康, "チップ間ワイヤレス電源伝送に関する検討," 電子情報通信学会　2003年基礎・境界ソサイエティ大会, 新潟大学, A-1-3, pp.3, Sep. 25, 2003

#2003034
石田光一, 桜井貴康, "負バイアス制御スイッチを用いた高精度スイッチトキャパシタ回路," 電子情報通信学会ソサエティ大会, 新潟大学, A-1-7, pp.7, Sep. 25, 2003

#2003035
宮崎隆行, 桜井貴康, "リーク電流エミュレータ -高閾値デバイスによる低閾値エミュレーション-," 電子情報通信学会 2003年基礎・境界ソサイエティ大会, 新潟大学, A-1-6, pp.6, Sep. 25, 2003

#2003036
Danardono Dwi Antono, Takayasu Sakurai, "Modeling of Inductive Interconnect Responses and Coupling Effects ," 電子情報通信学会ソサイエティ大会, 新潟大学, SA-1-3, pp.S-4, Sep. 25, 2003 (PDF)

#2003038
桜井貴康, "微細化で見えてきたLSI設計の技術的課題①," VLSI　Report, No.230, pp.6-8, Sep. 2003

#2003039
T. Sakurai, "(Invited)Perfective of Low Power Electronics," IEEE seminar on System on Chip: Design for Low power, France, Oct. 14, 2003

#2003040
T. Sakurai, "(Invited)System-on-a- Chip vs System-in-a-Package:design and interconnection issues," Advanced Metallization Conference(AMC)2003, Canada(Montreal), Oct. 21, 2003 (PDF)

#2003042
許　蛍雪, 崔　珍赫, 宮崎　隆行, 川口　博, 桜井　貴康, "高リーク環境におけるSelf-Timed Cut-Off法を利用した統計的なリーク電流削減手法," 電子情報通信学会技術研究報告, DSP2003-135, ICD2003-133, IE2003-95, pp.65-70, Oct. 2003

#2003043
Fayez Robert Saliba, Kyeong-Sik Min, 川口　博, 神田　浩一, 桜井　貴康, "サブ1VのSRAMにおけるリークを2桁以上削減する新手法RRDSV," 電子情報通信学会技術研究報告, DSP2003-136, ICD2003-134, IE2003-96, pp.71-76, Oct. 2003

#2003044
桜井貴康, "微細化で見えてきたLSI設計の技術的課題②," VLSI　Report, No.231, pp.6-8, Oct. 2003

#2003045
H. Im, T.Inukai, H.Gomyo, T.Hiramoto, T. Sakurai , "VTCMOS Characterisitics and Its Optimum Conditions Predicated By a Compact Analytical Model," IEEE Transactionｓ on very large sacale intagration(VLSI) Systems, Vol.Vol.11, No.No.5, pp.755-761, Oct. 2003

#2003046
染谷隆夫, 桜井貴康, "夢をかたちに・・・・実現に挑む有機半導体開発の最新動向"（特別講演）," , 「実装技術ロードマップ 2003(JEITA)報告」公開講演会, 回路会館　東京, Nov. 10, 2003

#2003047
桜井貴康, "システムインパッケージとスーパーコネクトへの期待," 第4回「プリント回路設計者のための設計セミナー」, 回路会館　地下一階会議室, Nov. 11, 2003 (PDF)

#2003048
染谷隆夫, 桜井貴康, "有機トランジスタと集積回路（招待講演）," 応用電子物性分科会誌・島津製作所関西支社マルチホール, 大阪, 第9巻　第5号, pp.241-246, Nov. 12, 2003

#2003049
染谷隆夫, 桜井貴康, "介護の手足となるゾ," 産経新聞, Nov. 22, 2003

#2003050
染谷隆夫, 桜井貴康, "先端技術「ヒト」に肉薄," 朝日新聞, Nov. 22, 2003

#2003051
染谷隆夫, 桜井貴康, "ロボット手触り感知," 日本経済新聞, Nov. 24, 2003

#2003052
染谷隆夫, 桜井貴康, "有機素子で繊細さ実現," 日刊工業新聞, Nov. 25, 2003

#2003053
染谷隆夫, 桜井貴康, "人工皮膚　2-3ミリ毎に感圧点," 日本工業新聞, Nov. 25, 2003

#2003054
桜井貴康, "サブ100nmLSI実用化に向けた真の技術課題を探る," 第7回システムワークショップ, 北九州, pp.169-, Nov. 26, 2003

#2003055
染谷隆夫, 桜井貴康, "心も伝わる？皮膚感覚あるロボット開発," 東京新聞, Dec. 2, 2003

#2003056
桜井貴康, "折り曲げ可能な人工皮膚有機トランジスタで実現," 日経エレクトロニクス, pp.32, Dec. 8, 2003

#2003057
染谷隆夫, 桜井貴康, "有機半導体の新領域を開拓," 日刊工業新聞, Dec. 12, 2003

#2003058
桜井貴康, 平本俊郎, 小野寺秀俊, "極低消費電力・新システムLSI技術の開発," シリコン超集積化システム大165委員会, 弘済会館, pp.1-11, Dec. 19, 2003

#2003059
桜井貴康, "スケーリングされた超高性能回路とスケーリング以外での新機能導入," 日経エレクトロニクス, 2003/12/22号, pp.67, Dec. 22, 2003

#2003060
桜井貴康, "電子人工皮膚の開発　OTFTで電子人工皮膚を開発　既存技術で低コスト化も実現," Electronic Journal, 12月号, pp.61, Dec. 2003

#2003061
J. H. Choi, T. Sakurai, "Statistical Leakage Current Reduction by Self-Timed Cut-Off Scheme for High Leakage Environments," IEEE Custom Integrated Circuits Conference, USA(San Jose), 28.3, Sep. 24, 2003

#2003062
K. Min, K. Kanda, T. Sakurai,, "Row-by-row dynamic source-line voltage Control (RRDSV) Scheme for Two orders of Magnitude Leakage Current Reduction of Sub-1-V-VDD SRAM's ," IEEE/ACM International Symposium on Low Power Electronics and Design,, Seoul, pp.66-71, Aug. 25-27, 2003

2002

#2002001
H. Kawaguchi, G. Zhang, S. Lee, Y. Shin, and T. Sakurai, "A Controller LSI for Realizing Vdd-Hopping Scheme with Off-the-Shelf Processors and Its Application to MPEG4 System," IEICE Transactions on Electronics, Vol.E85-C, No.2, pp.263-271, Feb. 2002 (PDF)

#2002002
T. Sakurai, "Low-power and High-Speed V VLSI Design with Low Supple Voltage Through Cooperation between Levels(Invited)," IEEE International Symposium on Quality Electronic Design, San Jose, CA, USA, 4A, pp.445-450, Mar. 2002

#2002003
K. Nose, M. Hirabayashi, H. Kawaguchi, S. Lee, and T. Sakura, "VTH-Hopping Scheme to Reduce Subthreshold Leakage for Low-Power Processors," IEEE Journal of Solid-State Circuits, Vol.37, No.3, pp.413-419, Mar. 2002 (PDF)

#2002004
D. D. Antono and T. Sakurai, "Transmission Line Models and Overshoots of On-chip Interconnects," 電子情報通信学会総合大会, A-3-22, Mar. 2002 (PDF)

#2002005
山田大裕, 桜井貴康, "バスシャフリングによるオンチップバスの低消費電力化(Bus shuffling for on-chip buses in low-power application-specific systems)," 電子情報通信学会総合大会, A-3-5, Mar. 2002

#2002006
T. Sakurai, "Low-Power LSI -Through cooperation among levels-," Germany-Japan Information Technology Forum, Birlinghoven/Windhagen, Germany, 2, Apr. 2002 (PDF)(PDF2)

#2002007
桜井貴康, "LSIの新境地を開くスーパーコネクト," 表面技術2002, 53, 4, pp.224-227, Apr. 2002

#2002008
桜井貴康, "ソフトウエア・ハードウエアの連携によるSuperHの低消費電力化," 第1回SuperHオープンフォーラム, pp.1-16, May 2002

#2002009
川口博, 辛英洙, 桜井貴康, "IP優秀賞：「75%電力節減可能な離散FV制御機構を有する低電力リアルタイムOS：μITRON-LP」," LSI IPデザイン・アワード運営委員会, 委員長：田中　昭二（財団法人国際超電導産業技術研究センター副理事長, 超電導工学研究所所長）, 副賞：研究助成金150万円, May 2002 (PDF)

#2002010
S. Hattori and T. Sakurai, "90% Write Power Saving SRAM Using Sense-Amplifying Memory Cell," Symposium on VLSI Circuits, Honolulu, HI, USA, 4.2, pp.46-47, June 2002 (PDF)

#2002011
T. Sakurai, "Achieving Low-Power LSI Through Cooperation Among Levels," Special Seminar, Dept. of EE, Univ. of Hawaii, Honolulu, HI, USA, June 2002

#2002012
Y. Shin and T. Sakurai, "Power Distribution Analysis of VLSI Interconnects Using Model Order Reduction," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol.21, No.6, pp.739-745, June 2002 (PDF)

#2002013
T. Sakurai, "国内技術研究者から見た日本LSI動向," SLI seminar, July 2002

#2002014
桜井貴康, "動作時リーク削減　回路からソフトまで連携," 日経マイクロデバイス8月号, pp.59-70, Aug. 2002

#2002015
K. Nose and T. Sakurai, "Power-Conscious Interconnect Buffer Optimization with Improved Modeling of Driver MOSFET and Its Implications to Bulk and SOI CMOS Technology," International Symposium on Low Power Electronics and Design, Monterey, CA, USA, 1.4s, pp.24-29, Aug. 2002 (PDF)

#2002016
神田浩一, 宮崎隆行, 服部貞昭, 桜井貴康, "センスアンプ型メモリセルを用いたSRAM書き込み電力の削減方式," 電子情報通信学会集積回路研究会, 函館, pp.65-70, Aug. 2002

#2002017
K. Kanda, T. Miyazaki, M. Kyeong Sik, H. Kawaguchi, and T. Sakurai, "Two Orders of Magnitude Leakage Power Reduction of Low Voltage SRAM's by Row-by-Row Dynamic VDD Control (RRDV) Scheme," IEEE ASIC/SOC conference, Rochester, NY, USA, FB2, pp.381-385, Sep. 2002

#2002018
T. Sakurai, "Minimizing Power Across Multiple Technology and Design Levels(Invited)," International Conference on Computer Aided Design, San Jose, CA, USA, 1B.1, pp.24-27, Nov. 2002

#2002019
桜井貴康, "SoCの現状と将来動向," EDN12月号, pp.70-77, Dec. 2002

#2002020
桜井貴康, "スーパーコネクト技術の現状と将来," 第3回ASET多層配線技術フォーラム, pp.47-69, Dec. 2002

#2002021
神田浩一, 宮崎隆行, 閔庚湜, 桜井貴康, "行単位での電源電圧制御(RRDV)を用いたSRAMのリーク電力削減手法- 0.5V世代の高速SRAMを目指して -," 電子情報通信学会集積回路研究会, 熊本, pp.7-12, Dec. 2002

#2002022
S. S. Lee, S. J. Lee, and T. Sakurai, "Energy-Constrained VDD/VTH Hopping Scheme with Run-Time Power Estimation for Low-Power Real-Time VLSI Systems," Journal of Circuits, Systems and Computers, Vol.11, No.6, pp.611-620, Dec. 2002 (PDF)

#2002023
H. Kawaguchi, K. Kanda, K. Nose, S. Hattori, D. D. Antono, D. Yamada, T. Miyazaki, K. Inagaki, T. Hiramoto, and T. Sakurai, "A 0.5-V, 400-MHz, VDD-Hopping Processor with Zero-VTH FD-SOI Technology," IEEE International Solid-State Circuits Conference, San Francisco, CA, USA, 6.3, pp.108-109, Feb. 2003

#2002024
K. Kanda, D. D. Antono, K. Ishida, H. Kawaguchi, T. Kuroda, and T. Sakurai, "1.27-Gbps/pin, 3mW/pin Wireless Superconnect (WSC) Interface Scheme," IEEE International Solid-State Circuits Conference, San Francisco, CA, USA, 10.7, pp.186-187, Feb. 2003

#2002025
K. S. Min and T. Sakurai, "Zigzag Super Cut-off CMOS (ZSCCMOS) Block Activation with Self-Adaptive Voltage Level Controller: An Alternative to Clock-Gating Scheme in Leakage Dominant Era," IEEE International Solid-State Circuits Conference, San Francisco, CA, USA, 22.8, pp.400-401, Feb. 2003 (PDF)

#2002026
T. Sakurai, "Perspectives on Power-Aware Electronics (Plenary Talk, Invited)," IEEE International Solid-State Circuits Conference, San Francisco, CA, USA, 1.2, pp.26-29, Feb. 2003

#2002027
桜井貴康, "システムインパッケージの期待," North実装技術セミナー, ホテルメトロポリタン, Feb. 2003

#2002028
K. Kanda and T. Sakurai, "Low-Power High-Speed Circuit Design for VLSI Memory Systems," Doctor Dissertation, Feb. 2003 (PDF)

#2002029
山田大裕, 桜井貴康, "新規アルゴリズムを使用した複数のアプリケーション下でのバスシャフリングによるオンチップバスの消費電力削減," 電子情報通信学会総合大会, A-3-4, Sep. 2002

#2002030
D. D. Antono and T. Sakurai, "Modeling of Inductive Interconnect Responses and Coupling Effects in Deep-Submicron VLSI," Master Dissertation, Feb. 2003 (PDF)

#2002031
Q. Liu, T. Sakurai, and T. Hiramoto, "Optimum Device Consideration for　Standby Power Reduction Scheme Using Drain Induced Barrier Lowering (DIBL)," International Conference on Solid State Devices and Materials, Nagoya Congress Center, pp.258-259, Sep. 2002

#2002032
山田大裕, 桜井貴康, "バスシャフリングとその拡張に関する理論的及び実験的考察," 修士論文, 東京大学, Feb. 2002

#2002033
K. Aisaka, T. Aritsuka, S. Misaka, K. Toyama, K. Uchiyama, K. Ishibashi, H. Kawaguchi, and T. Sakurai, "Design rule for frequency-voltage cooperative power control and its application to an MPEG-4 Decoder," Symposium on VLSI Circuits, pp.216-217, June 2002 (PDF)

#2002034
J. Goodman, T. Sakurai, D. Buss, and T. Suga, "SOC (System-on-a-chip) versus SIP (System-in-a-package)," Symposium on VLSI Circuits, Panel discussion, pp.96, June 2002 (PDF)

#2002035
桜井貴康, "本音で語る今後の半導体技術戦略　重要アプリケーションとキー技術," JST フォーラム, 後楽園会館, pp.Ⅲ-1-6, Jan. 16, 2003

#2002036
桜井貴康, "最先端システムLSIの現状と課題," 電子・情報技術ワークショップ, 航空会館, pp.38-55, Jan. 14, 2003

2001

#2001001
T. Sakurai, "Low Power Design of Digital Circuits," International Symposium on Key Technologies for Future VLSI Systems, pp.1-5, Jan. 2001 (PDF)

#2001002
桜井貴康, "極低消費電力・新システムLSIの開拓," 超集積化デバイス・システム第165委員会第19回研究会資料, pp.1-15, Apr. 10, 2001 (PDF)

#2001003
T. Sakurai, "VLSI design challenges and EDA in the forthcoming decade," DA SHOW 2001 TOKYO, July 17, 2001 (PDF)

#2001004
桜井貴康, "スーパーコネクトに対応した層間接続プロセス," 実装プロセス工学シンポジウム, May 18, 2001 (PDF)(PDF2)

#2001005
T. Sakurai, "Recent Topics for Realizing Low-Power, High-Speed VLSI's," International Symposium on Advanced CMOS Devices, pp.17-22, Oct. 31, 2001 (PDF)(PDF2)

#2001006
桜井貴康, "これからの研究開発に求められること," NEDO フォーラム2001テクニカルセッション, Sep. 20, 2001 (PDF)

#2001007
T. Sakurai, "Issues of Current LSI Technology and an Expectation for New System-Level Integration," International Conference on Solid State Devices and Materials, pp.36-37, Sep. 2001 (PDF)(PDF2)

#2001008
T. Sakurai, "Perspective of VLSI in the year 2010 and beyond? From a designer's point of view," JSAP International No.3, pp.15-21, Jan. 2001 (PDF)

#2001009
T. Sakurai, "Panel on Low-Voltage Design or the End of CMOS Scaling?," IEEE International Solid-State Circuits Conference, San Francisco, CA, USA, Evening Session, Feb. 2002 (PDF)

#2001010
桜井貴康, "DSM配線とスーパーコネクトへの期待," 電子情報通信学会技術報告書, デザインガイヤ, pp.15-20, Nov. 28, 2001 (PDF)

#2001011
桜井貴康, "半導体復活に向けた異業種連携による産学共同研究," CCRシンポジウム, 東京, Dec. 7, 2001 (PDF)

#2001012
H. Im, T. Inukai, H. Gomyo, T. Hiramoto, and T. Sakurai, "VTCMOS Characteristics and Its Optimum Conditions Predicted by a Compact Analytical Model," International Symposium on Low Power Electronics and Design, pp.123-128, Aug. 2001 (PDF)(PDF2)

#2001013
T. Inukai, T. Hiramoto, and T. Sakurai, "Variable Threshold Voltage CMOS (VTCMOS) in Series Connected Circuits," International Symposium on Low Power Electronics and Design, pp.201-206, Aug. 2001 (PDF)(PDF2)

#2001014
Y. Shin and T. Sakrai, "Estimation of Power Distribution in VLSI Interconnects," International Symposium on Low Power Electronics and Design, pp.370-375, Aug. 2001 (PDF)

#2001015
M. Hirabayashi and T. Sakurai, "Design Methodology and Optimization Strategy for Dual-VTH Scheme using Commercially Available Tools," International Symposium on Low Power Electronics and Design, pp.283-286, Aug. 2001 (PDF)

#2001016
D. D. Antono, T. Sakurai, "Inductance Effect on VLSI Interconnections," 電子情報通信学会 2001年基礎・境界ソサイエティ大会, pp.61, Sep. 18, 2001 (PDF)

#2001017
桜井貴康, "敷居の低いTLOを目指して," 産学官連携支援マガジン InterLab, 36, pp.31-36, Oct. 2001 (PDF)

#2001018
山田大裕, 辛英洙, 川口博, 桜井貴康, "Bus Shuffling 低消費電力向けの新しいバス技術," 電子情報通信学会技術研究報告信学技報ICD2001-65～78, 101, 266, pp.1-8, Aug. 24, 2001 (PDF)

#2001019
K. Nose, M. Hirabayashi, H. Kawaguchi, S. Lee, and T. Sakurai, "VTH-hopping scheme for 82% power saving in low-voltage processors," IEEE Custom Integrated Circuits Conference, pp.93-96, May 2001 (PDF)

#2001020
野瀬浩一, 平林雅之, 川口博, 李誠洙, 桜井貴康, "閾値ホッピング(VTH-hopping)手法を用いた低電圧・低消費電力プロセッサ," 電子情報通信学会技術研究報告信学技報ICD2001-33, 2001 (PDF)

#2001021
K. Nose and T. Sakurai, "Two schemes to reduce interconnect delay in bi-directional and uni-directional buses," Symposium on VLSI Circuits, pp.193-194, June 2001 (PDF)

#2001022
K. Nose and T. Sakurai, "Current sensing device for micro-IDDQ test," Electronics and Communications in Japan part 2, 84, 9, May 2001 (PDF)

#2001023
H. Kawaguchi, G. Zhang, S. Lee, and T. Sakurai, "An LSI for VDD-Hopping and MPEG4 System Based on the Chip," IEEE International Symposium on Circuit and Systems, pp.918-921, May 2001 (PDF)

#2001024
川口博, 張綱, 李誠洙, 辛英洙, 桜井貴康, "低電力実時間組込システムのためのOS, アプリケーション, ハードウェア協調によるCVS(Cooperative Voltage Scaling)と電圧ホッピング," 電子情報通信学会技術研究報告 ICD2001-32, pp.59-65, May 2001 (PDF)

#2001025
H. Kawaguchi, Y. Shin, and T. Sakurai, "Experimental Evaluation of Cooperative Voltage Scaling (CVS): A Case Study," IEEE Workshop on Power Management for Real-Time and Embedded Systems, pp.17-23, Feb. 2001 (PDF)

#2001026
桜井貴康, 平本俊郎, "極低消費電力・新システムLSI技術の開拓," 未来開拓学術研究推進事業研究プロジェクトの紹介, 2001

#2001027
川口博, 張綱, 李誠洙, 桜井貴康, "IP優秀賞：「"電圧ホッピングとアプリケーションスライシングによるリアルタイムアプリケーション向け低電力プロセサシステム」," LSI IPデザイン・アワード運営委員会, 委員長：田中昭二（財団法人国際超電導産業技術研究センター副理事長超電導工学研究所所長）, 副賞：研究助成金150万円, Mar. 2001 (PDF)

#2001028
犬飼貴士, 高宮真, 小宇羅寛, 後明寛之, 川口博, 桜井貴康, 平本俊郎, "High-SpeedモードVTCMOSとそのスケーラビリティ," 2001年春季第48回応用物理学関係連合講演会, 明治大学(東京), 29a-B-8, Sep. 2001 (PDF)

#2001029
犬飼貴士, 桜井貴康, 平本俊郎, "縦積み回路におけるVTCMOSの最適設計," 2001年秋季第62回応用物理学会学術講演会, 愛知工業大学(愛知), Mar. 2001 (PDF)

#2001030
Hyunsik Im, T. Inukai, H. Gomyo, T. Sakurai, and T. Hiramoto, "Study of VTCMOS characteristics and its optimum conditions with a compact analytical model," 2001年春季第48回応用物理学関係連合講演会, 明治大学(東京), 29a-B-9, Sep. 2001 (PDF)

#2001031
Hyunsik Im, T. Inukai, T. Sakurai, and T. Hiramoto, "Study of Short Channel Effect on the characteristics of a VTCMOS," 2001年秋季第62回応用物理学会学術講演会, 愛知工業大学(愛知), Sep. 21, 2001 (PDF)

#2001032
服部貞昭, 桜井貴康, "低振幅ビット線方式を用いた低消費電力高速SRAM," 電子情報通信学会エレクトロニクスソサイエティ大会, C-12-38, pp.99, Sep. 14, 2001 (PDF)

#2001033
服部貞昭, 神田浩一, 桜井貴康, "高速レベルコンバータ," 応用物理学会学術講演会, pp.703, Feb. 2001 (PDF)

#2001034
桜井貴康, "半導体開発研究のあり方," FEDサロン, Oct. 2001

#2001035
T. Sakurai, "VLSI design challenges in the forthcoming decade - What may hinder design closure- (invited)," Design closure forum, pp.3.1-3.49, July 2001 (PDF)

#2001036
神田浩一, グエンドゥックミン, 川口博, 桜井貴康, "低スタンバイ電流SRAMのための異常リーク電流抑制方式," 月刊ディスプレイ ("話題のディスプレイと周辺回路技術"の中で掲載), pp.48-53, Oct. 2001 (PDF)

#2001037
K. Kanda, K. Nose, H. Kawaguchi, and T. Sakurai, "Design Impact of Positive Temperature Dependence of Drain Current in Sub 1V CMOS VLSI's," IEEE Journal of Solid-State Circuits, Vol.36, No.10, pp.1559-1564, Oct. 2001 (PDF)

#2001038
神田浩一, グエンドゥックミン, 川口博, 桜井貴康, "低スタンバイ電流SRAMのための異常リーク電流抑制方式," VDECデザイナーズフォーラム, Aug. 2001 (PDF)

#2001039
桜井貴康, "最近のVLSI設計の課題とその解法－低消費電力設計技術を中心に－（招待）," 最近のVLSI設計の課題とその解法講演会, 沖ヒューマンネットワーク, 講義No11, pp.1-52, Nov. 2001

#2001040
桜井貴康, "2010年に向けてのシステムLSIの課題と展望（招待）," Re-Generation 21Advanced Course, ソニーヒューマンキャピタル㈱テクノロジー研修部, pp.1-163, June 2001

#2001041
桜井貴康, "スーパーコネクト新たなエレクトロニクス産業を切り開くパッケージ実装産業技術," Breakthrough, リアライズ社, Dec. 2001 (PDF)

#2001042
T. Sakurai, "Superconnect Technology (invited)," IEICE Transactions on Electronics, Vol.E84/C12, No., pp.1709-1716, June 2001 (PDF)

#2001043
神田浩一, グエン・ドゥック・ミン, 川口博, 桜井貴康, "低スタンバイ電流SRAMのための異常リーク電流抑制方式," 電子材料（特集"低消費電力化進む半導体デバイス"の中で掲載）, pp.24-28, Apr. 2001 (PDF)

#2001044
神田浩一, グエンドゥックミン, 川口博, 桜井貴康, "低スタンバイ電流SRAMのための異常リーク電流抑制方式," 電子情報通信学会集積回路研究会, pp.21-25, Dec. 2001 (PDF)

#2001045
野瀬浩一, 桜井貴康, "Circuit Design for Low-Power High-Speed VLSI Processorin 0.5V Generation (0.5V世代の低電力・高速VLSIプロセッサを志向した回路設計)," 博士論文, Tokyo Univ., 2001 (PDF)

#2001046
桜井貴康, "日本の半導体再興のために- 設計者の立場から -," 日本の半導体を語る会, Aug. 2001

#2001047
服部貞昭, 桜井貴康, "Low-Power SRAM Design using Low-Voltage and Low-Swing Techniques," 修士論文, 東京大学, Feb. 2002 (PDF)

2000

#2000001
浅野雄太郎, 桜井貴康, "Adiabatic原理を用いたCMOS回路用クロックジェネレータ," 修士論文, 東京大学, Mar. 2000 (PDF)

#2000002
張綱, 桜井貴康, "VDDホッピングVLSI用クロック発生回路とDC-DCコンバータの研究," 修士論文, 東京大学, Mar. 2000 (PDF)

#2000003
平林雅之, 桜井貴康, "低消費電力高性能プロセッサに関する研究," 修士論文, 東京大学, Mar. 2000 (PDF)

#2000004
桜井貴康, "システムLSI設計の現状と課題," 情報処理学会論文誌, 41, 4, Apr. 2000 (PDF)

#2000005
野瀬浩一, 桜井貴康, "マイクロIDDQテストのための電流測定デバイス," 電子情報通信学会論文誌, J83-C, 6, pp.516-522, June 2000 (PDF)

#2000006
K. Nose, and T. Sakurai, "Analysis and Future Trend of Short-Circuit Power," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol.19, No.9, pp.1023-1030, Sep. 2000 (PDF)

#2000007
H. Kawaguchi, K. Nose, and T. Sakurai, "A Super Cut-off CMOS (SCCMOS) Scheme for 0.5-V Supply Voltage with Picoampere Stand-by Current," IEEE Journal of Solid-State Circuits, Vol.35, No.10, pp.1498-1501, Oct. 2000 (PDF)

#2000008
Y. Shin, K. Choi, and T. Sakurai, "Power-Conscious Scheduling for Real-Time Embedded Systems Design," An International Journal of Custom-Chip Design, Simulation, and Testing, Vol., No., 2001 (PDF)

#2000009
桜井貴康, "スーパーコネクト技術とグローバルインテグレーション（基調講演）," 応用物理学会シリコンテクノロジー第23回研究会, Nov. 2000

#2000010
T. Sakurai, "Design Challenges for 0.1um and Beyond," Asia and South Pacific Design Automation Conference, pp.553-558, Jan. 2000 (PDF)

#2000011
S. Lee, and T. Sakurai, "Run-Time Power Control Scheme Using Software Feedback Loop for Low-Power Real-Time Applications," Asia and South Pacific Design Automation Conference, pp.381-386, Jan. 2000 (PDF)

#2000012
N. D. Minh, and T. Sakurai, "Compact yet High-Performance (CyHP) Library for Short Time-to-Market with New Technologies," Asia and South Pacific Design Automation Conference, pp.475-480, Jan. 2000 (PDF)

#2000013
K. Nose, and T. Sakurai, "Optimization of VDD and VTH for Low-Power and High-Speed Applications," Asia and South Pacific Design Automation Conference, pp.469-474, Jan. 2000 (PDF)

#2000014
T. Sakurai, "Low Power Design of Digital Circuits," International Symposium on Key Technologies for Future VLSI Systems, pp.1-5, Jan. 2000 (PDF)

#2000015
T. Sakurai, "Reducing Power Consumption of CMOS VLSI's through VDD and VTH Control," IEEE International Symposium on Quality Electronic Design, pp.417-423, Mar. 2000 (PDF)

#2000016
T. Inukai, M. Takamiya, K. Nose, H. Kawaguchi, T. Hiramoto, and T. Sakurai, "Boosted Gate MOS (BGMOS): Device/Circuit Cooperation Scheme to Achieve Leakage-Free Giga-Scale Integration," IEEE Custom Integrated Circuits Conference, pp.409-412, May 2000 (PDF)

#2000017
S. Lee, and T. Sakurai, "Run-Time Voltage Hopping for Low-Power Real-Time Systems," Design Automation Conference, pp.806-809, June 2000 (PDF)

#2000018
K. Nose, S. Chae, and T. Sakurai, "Voltage Dependent Gate Capacitance and Its Impact in Estimating Power and Delay of CMOS Digital Circuits with Low Supply Voltage," International Symposium on Low Power Electronics and Design, pp.228-230, July 2000 (PDF)

#2000019
桜井貴康, "携帯型超高性能情報端末実現に向けた超低消費電力集積化技術," 国際固体素子・材料コンファレンス, ショートコース2, pp.1-25, Oct. 2000 (PDF)

#2000020
T. Sakurai, "Interconnection from Design Perspective," Advanced Metallization Conference, pp.53-58, Oct. 2000 (PDF)(PDF2)

#2000021
Y. Shin, K. Choi, and T. Sakurai, "Power Optimization of Real-Time Embedded Systems on Variable Speed Processors," International Conference on Computer Aided Design, pp.365-368, Nov. 2000 (PDF)

#2000022
T. Sakurai, "Super-connect," International Packaging Strategy Symposium, pp.19-26, Dec. 2000 (PDF)

#2000023
K. Kanda, N. D. Minh, H. Kawaguchi, and T. Sakurai, "Abnormal Leakage Suppression (ALS) Scheme for Low Standby Current SRAMs," IEEE International Solid-State Circuits Conference, pp.174-175, Feb. 2001 (PDF)

#2000024
Y. Shin, H. Kawaguchi, and T. Sakurai, "Cooperative Voltage Scaling (CVS) between OS and Applications for Low-Power Real-Time Systems," IEEE Custom Integrated Circuits Conference, pp.553-556, May 2001 (PDF)

#2000025
Y. Shin and T. Sakurai, "Coupling-Driven Bus Design for Low-Power Application-Specific Systems," Design Automation Conference, pp.750-753, June 2001 (PDF)

#2000026
Y. Shin and T. Sakurai, "Estimation of Power Distribution in VLSI Interconnects," International Symposium on Low Power Electronics and Design Accepted, Aug. 2001 (PDF)

#2000027
桜井貴康, "エレクトロニクス産業の将来技術," シンポジウム「ガラス産業技術戦略2025年」, Mar. 2000 (PDF)

#2000028
桜井貴康, "2010年のLSIと電子システム," エレクトロニクス実装学術講演大会, pp.17, Mar. 2000 (PDF)

#2000029
桜井貴康, "回路設計への影響," 応用物理学関係連合講演会講演予稿集, Mar. 2000 (PDF)

#2000030
桜井貴康, "デバイスパネルディスカッション," 21世紀を拓く半導体技術ワークショップ, 3, pp.19-26, June 2000 (PDF)

#2000031
平林雅之, 桜井貴康, "低消費電力乗算器における加算回路形式の検討," 応用物理学会学術講演会, pp.800, Sep. 2000 (PDF)

#2000032
浅野雄太郎, 桜井貴康, "Adiabatic style='font-family概念を応用したCMOS用クロック回路," 応用物理学会学術講演会, pp.800, Sep. 2000 (PDF)

#2000033
張綱, 桜井貴康, "高効率容量型ＤＣ－ＤＣコンバータ," 応用物理学会学術講演会, pp.801, Sep. 2000 (PDF)

#2000034
桜井貴康, "LSIの複雑化動向," 電子情報通信学会ソサイエティ大会, pp.26, Oct. 2000 (PDF)

#2000035
張綱, 桜井貴康, "高速周波数切り替え可能なクロック生成系," 電子情報通信学会ソサエティー大会, pp.28, Oct. 2000 (PDF)

#2000036
平林雅之, 桜井貴康, "基板バイヤス制御を可能にする自動設計手法," 電子情報通信学会ソサエティー大会, pp.28, Oct. 2000 (PDF)

#2000037
稲垣賢一, 神田浩一, 桜井貴康, "ITRSロードマップ準拠標準SPICEモデルの構築," 電子情報通信学会ソサイエティ大会, pp.28, Oct. 2000 (PDF)

#2000038
浅野雄太郎, 野瀬浩一, 桜井貴康, "デプリーション形CMOSゲートの特性," 電子情報通信学会ソサエティー大会, pp.28, Oct. 2000 (PDF)

#2000039
神田浩一, グエン・ドゥック・ミン, 川口博, 桜井貴康, "低スタンバイ電流ＳＲＡＭのための異常リーク電流抑制方式," 電子通信学会集積回路研究会, pp.21-25, Apr. 12, 2001 (PDF)

#2000040
T. Sakurai, "Low Power Integrated Circuit Technologies for High-Performance Extremely Low-Power Mobile Information Terminals," SSDM Short Course, Sep. 2000

#2000041
桜井貴康, "エレクトロニクス機器設計力強化技術の調査研究報告書," 新エネルギー・産業技術総合開発機構, 社団法人日本電子機械工業会, Mar. 2000 (PDF)

#2000042
桜井貴康, "21世紀のLSI技術体系, 提言「スーパーコネクト」," 日経マイクロデバイス4月1日号, pp.7, Apr. 2000 (PDF)

#2000043
桜井貴康, "LSIの新境地を切り開く「スーパーコネクト」技術," 日経マイクロデバイス・セミナー, スーパーコネクト」の衝撃, 1, pp.1-27, Apr. 2000 (PDF)

#2000044
桜井貴康, "なぜシステム・イン・パッケージか？―システムLSIとの対比," 日経マイクロデバイス・セミナー「システム・イン・パッケージ」の実像に挑む, 1, pp.1-33, Apr. 2000 (PDF)

#2000045
桜井貴康, "巨大配線でLSIの限界を打破," 日経マイクロデバイス6月1日号, pp.72-75, June 2000 (PDF)

#2000046
桜井貴康, "設計からみた低消費電力・高速化技術," セミコン関西2000, ULSI技術セミナー, 3, pp.25-41, June 2000 (PDF)

#2000047
桜井貴康, "デジタルVLSI設計技術の基礎," VLSI設計チュートリアル講座, 2, Nov. 2000 (PDF)

#2000048
犬飼貴士, 高宮真, 野瀬浩一, 川口博, 桜井貴康, 平本俊郎, "Boosted Gete MOS(BGMOS)によるリークフリー回路の提案," 2000年春季第47回応用物理学関連連合講演会, 青山学院大学（東京）, 28p-ya-10, Mar. 2000 (PDF)

#2000049
犬飼貴士, 高宮真, 野瀬浩一, 川口博, 桜井貴康, 平本俊郎, "Boosted Gate MOS(BGMOS)：デバイスと回路の協調によるリークフリー回路の提案," 電子情報通信学会集積回路研究会/電子デバイス研究会/シリコン材料・デバイス研究会合同研究会, 北見工業大学（北海道）, ED2000-124/SDM2000-106/ICD2000-60, Aug. 2000 (PDF)

#2000050
犬飼貴士, 高宮真, 野瀬浩一, 川口博, 桜井貴康, 平本俊郎, "Boosted Gate MOSとSuper Cut-off CMOSによるリークフリー回路," 2000年秋季第61回応用物理学会学術講演会, 北海道工業大学, 6a-ZE-3, Sep. 2000 (PDF)

#2000051
桜井貴康, "電圧ホッピングによるSH4システム搭載システムの低電力化," 日立SHフォーラム, 2000

#2000052
T. Sakurai, "VLSI design challenges in the forthcoming decade," In-Chip Systems, Feb. 2001

#2000053
T. Sakurai, "Software and Hardware Schemes for Achieving Low-Power," Microprocessor Design Symposium, Feb. 8, 2001

#2000054
T. Sakurai, "高速低消費電力化技術," ローム, 2000

#2000055
桜井貴康, "情報ネットワーク家電向けシステムＬＳＩを意識した低消費電力技術のロードマップ, 望まれるシステム像," EIAJ, Oct. 2000

#2000056
T. Sakurai, "VLSI design challenges in the forthcoming decade - What may hinder design closure -," Design closure forum, Feb. 1, 2001

#2000057
桜井貴康, "今後のVLSIの設計課題と解法 2010年のLSI回路設計の展望と技術的問題の解決," Sony Re-generation 21 Advanced Course, 2000

#2000058
桜井貴康, "GSI配線の設計課題と解決策の模索," 電子情報通信学会2000年ソサイエティ大会, 名古屋ビール園「浩養園」, TA-1, pp.27, Sep. 30, 2000

1999

#1999001
桜井貴康, "21世紀のLSI－何が欲しい, 何を作る," Breakthrough, pp.4-6, Jan. 1999 (PDF)

#1999002
K. Nose and T. Sakurai, "Micro IDDQ Test using Lorenz Force MOSFET's," Symposium on VLSI circuits, pp.169-170, June 1999 (PDF)

#1999003
T. Sakurai, "Custom Circuit Techniques For High Performance And Low-Power Applications," IEEE Custom Integrated Circuits Conference, pp.277, May 1999

#1999004
桜井貴康, "(招待論文)システムLSI設計の現状と課題," DAシンポジウム'99論文集, pp.1-8, July 1999 (PDF)

#1999005
桜井貴康, "システムLSIは半導体産業の救世主になりうるのか！," 第2回LSIフォーラムシステムLSI は半導体産業の救世主になりうるのか！, pp.1-8, May 1999

#1999006
桜井貴康, "CMOS VLSIの基礎回路と性能," 第1回半導体プロセス技術者のためのデバイス基礎講座[前編], pp.3-35, Apr. 1999

#1999007
桜井貴康, "半導体, どこまで進化," 日本経済新聞, Oct. 27, 1999 (PDF)

#1999008
T. Sakurai, "Panel on Hardware is King, Software is Queen: Has Hardware become a Second-Class Citizen to Software?," IEEE International Solid-State Circuits Conference, Panel discussion, pp.294-295, Feb. 1999

#1999009
T. Sakurai, "LSI design toward 2010 low-power technology," International Conference on VLSI and CAD, pp.325-334, Oct. 1999 (PDF)

#1999010
T. Sakurai, "Toward LSI's in the Year-From the Design Viewpoint," Symposium on Semiconductors and Integrated Circuits Technology, pp.95-105, June 1999

#1999011
T. Sakurai, "Low Voltage, High-speed VLSI Design," International Conference on Solid State Devices and Materials, pp.3-30, Sep. 1999

#1999012
桜井貴康, "通信・ネットワーク時代のシステムLSI技術の展望," 第3回システムLSIフォーラム通信・ネットワーク時代のシステムLSI技術, pp.1-15, Sep. 1999

#1999013
桜井貴康, "システムLSI「高機能と低電力」実現," 日本経済新聞, May 1999 (PDF)

#1999014
桜井貴康, "高集積システムLSIの動向と消費電力化対応技術," STARC symposium 99, pp.5-12, Sep. 1999 (PDF)

#1999015
T. Sakurai, "Toward LSI's in the year 2010," IC Design Education Center (IDEC) in Korea Conference, Kwangju, Korea, pp.3-69, Oct. 1999

#1999016
桜井貴康, "(招待論文)2010年のLSIと消費電力技術," 電子情報通信学会技術研究報告書, pp.65-72, July 1999

#1999017
桜井貴康, "情報処理を担うCMOS LSIの話," 情報処理, pp.184-187, Feb. 1999 (PDF)

#1999018
桜井貴康, "第8回電子回路世界大会大会基調講演 2010年のLSIと電子システム～LSIからのメッセージ～," JPCA NEWS, pp.3-15, Oct. 1999 (PDF)

#1999019
桜井貴康, "高集積化と混載技術を基盤とするシステムLSI," 日経エレクトロニクス, pp.120-134, Mar. 1999 (PDF)

#1999020
桜井貴康, "設計の視点から見たSOI技術," JST Forum, Mar. 16, 1999

#1999021
桜井貴康, "激動するLSI産業," 三菱電機技報, 74, 3, Mar. 25, 2000 (PDF)

#1999022
桜井貴康, "[総説] 画像・グラフィックスの最新の動き," 第4回LSIフォーラム画像・グラフィックスとシステムLSI技術, pp.1-1-1-8, Nov. 26, 1999

#1999023
T. Sakurai, "Challenges in VLSI Design Toward the New Millennium," IC Design Education Center (IDEC) in Korea Conference, Oct. 1999 (PDF)

#1999024
桜井貴康, "大規模LSI 故障個所簡単に診断," 日刊工業新聞, June 18, 1999 (PDF)

#1999025
桜井貴康, "各社, 得意分野にリソースを集中," 日本経済新聞, Oct. 27, 1999 (PDF)

#1999026
桜井貴康, "日本の半導体技術開発（主に回路設計技術）におけるこれまでと今後の課題," 日本政策投資銀行, イノベーション研究会, Feb. 2000

#1999027
桜井貴康, "2010年のLSI回路設計の展望と技術的問題の解決," Sony Re-generation 21 Advanced Course 研修, Dec. 1999

#1999028
桜井貴康, "システムＬＳＩ技術及び高速低消費電力化技術について," 松下電器産業(株), Sep. 1999

#1999029
桜井貴康, "回路設計への影響," 応用物理学会, Mar. 2000

#1999030
桜井貴康, "2010年のＬＳＩと電子システム～ＬＳＩからのメッセージ～Electronic Systems and LSI’s in Year 2010 -A Message from LSI’s -," 実装学会, Mar. 2000

#1999031
桜井貴康, "2010年のＬＳＩと電子システム～ＬＳＩからのメッセージ～," 第８回電子回路世界大会大会基調講演, 1999

#1999032
桜井貴康, "2010年のLSIと低消費電力技術," 富士通CAD関係成果発表会, Nov. 2000

#1999033
T. Sakurai, "Design Impact of Positive Temperature Dependence of Drain Current in Sub 1V CMOS VLSI's," IEEE Custom Integrated Circuits Conference, May 1999

#1999034
N. Minh Duc, T. Sakurai, "コンパクトな高速低消費電力ライブラリーの研究," 修士論文, 東京大学, 2000 (PDF)

#1999035
T. Sakurai, "Achieving Low-Power Through VDD and VTH Control," Intel, Mar. 2000

#1999036
神田浩一, 桜井貴康, "低電圧高性能クロックジェネレータに関する研究," 修士論文, 東京大学, Feb. 2000 (PDF)

1998

#1998001
桜井貴康, 川口博, ら, "低消費電力, 高速LSI技術（桜井貴康・編）," リアライズ社, 東京, 4-89808-004-9, pp.3-15, 148-152, Feb. 1998

#1998002
T. Sakurai, "Challenges for Low-Power and High-performance Chips," IEEE Design & Test of Computers, Vol., No.3, pp.119-124, Sep. 1998 (PDF)

#1998003
S. Ishiwata and T. Sakurai, "Future Directions of Media processors," IEICE Transactions on Electronics, Vol.E81-C, No.5, pp.629-635, May 1998 (PDF)

#1998004
H. Kawaguchi and T. Sakurai, "A Reduced Clock-Swing Flip-Flop(RCSFF)for 63% Power Reduction," IEEE Journal of Solid-State Circuits, Vol.33, No.5, pp.807-811, May 1998 (PDF)

#1998005
桜井貴康, "システムLSIのアプリケーションとシステムLSIの課題," 電気情報通信学会誌, pp.1082-1086, Nov. 1998 (PDF)

#1998006
H. Kawaguchi, K. Nose, and T. Sakurai, "A COMS Scheme for 0.5v Supply Voltage with Pico-Ampere Standby Current," IEEE International Solid-State Circuits Conference, 12.4, pp.192-193, Feb. 1998 (PDF)

#1998007
H. Kawaguchi and T. Sakurai, "Delay and Noise Formulas for Capacitively Coupled Distributed RC Lines," Asia and South Pacific Design Automation Conference, pp.35-43, Feb. 1998 (PDF)

#1998008
T. Sakurai, "Panel on How Will Media processors the Next Decade?," IEEE International Solid-State Circuits Conference, Panel discussion, pp.264-265, Feb. 1998

#1998009
T. Sakurai, "Audio and Video Digital Processing," IEEE Custom Integrated Circuits Conference, pp.167, May 1998

#1998010
H. Kawaguchi, Y. Itaka and T, Sakurai, "Dynamic Leakage Cut-off Scheme Low-Voltage SRAM's," Symposium on VLSI Circuits, pp.140-141, June 1998 (PDF)

#1998011
R. Allmon and T. Sakurai, "Panel on Visions of Computers in the year 2005," Symposium on VLSI Circuits, pp.69, June 1998 (PDF)

#1998012
H. Kawaguchi, K. Nose, and T. Sakurai, "A COMS Scheme for 0.5V Supply Voltage with Pico-Ampere Standby Current," International Workshop on Advanced LSIs, pp.45-49, July 1998 (PDF)

#1998013
S. Takeuchi and T. Sakurai, "A-Fine Grain, Current Mode Scheme for VLSI Proximity Search Engine," International Conference on Computer Design, pp.184-185, Oct. 1998 (PDF)

#1998014
K. Nose and T. Sakurai, "Integrated Current Sensing Device for Micro IDDQ Test," Asian Test Symposium, pp.323-326, Dec. 1998 (PDF)

#1998015
桜井貴康, "VLSIを目指して," 固体エレクトロニクス・オプトエレクトロニクス研究発表会, pp.63-72, Feb. 1998

#1998016
竹内誠二, 桜井貴康, "高密度神経回路網の設計," 第45回応用物理学会関係連合講演会, pp. 890, Mar. 1998

#1998017
桜井貴康, "消費電力," 配線遅延から見たLSIの集積化限界応用物理学会シリコンテクノロジー研究会, pp.28-33, May 1998 (PDF)

#1998018
川口博, 井高康二, 桜井貴康, "低電圧SRAMのためのDynamic Leakage Cut-off設計法," 電子情報通信学会技術研究報告, 98, 119, pp.1-4, June 1998 (PDF)

#1998019
井高康二, 桜井貴康, "配線遅延近似精度のモーメントマッチング次数依存性," 59回応用物理学会学術講演会, pp.781, Sep. 1998

#1998020
井高康二, 桜井貴康, "ディープサブミクロン配線のリピーター挿入最適化," 電子情報通信学会ソサイエティ大会, pp.93, Sep. 1998 (PDF)

#1998021
川口博, 野瀬浩一, 桜井貴康, "A COMS Scheme for 0.5v Supply Voltage with Pico-Ampere Standby Current," 電子学会極微構造集積デバイス調査専門委員会, Mar. 1998

#1998022
桜井貴康, 黒田忠広, "CMOS LSI技術," ＩＩＳ産業科学システムズ, pp.1-33, Jan. 1998

#1998023
桜井貴康, "2010年のVLSIを目指して," 東京大学固体エレクトロニクス・オプトエレクトロニクス研究発表会, pp.63-72, 1998 (PDF)

#1998024
桜井貴康, "メディアプロセッサは次の10年をどう支配するか," エレクトロニクス, pp.4-6, Apr. 1998

#1998025
桜井貴康, "システムLSIの今後の展望と課題," CMP技術の基礎と実例講座シリーズ第3回, pp.1-1-1-6, 1998

#1998026
桜井貴康, "半導体, 2つの挑戦低消費電力化とシステムLSI化," 日本経済新聞, May 18, 1998 (PDF)

#1998027
桜井貴康, "ULSIプロセスにおける銅配線技術の動向と展望," CMP技術の基礎と実例講座シリーズ第3回, pp.2-1-2-6, Sep. 1998

#1998028
桜井貴康, "低消費電力高速LSIの今後を探る," リアライズ最新技術講座, pp.1-1-1-4, Oct. 1998

#1998029
桜井貴康, "システムLSIの現状と未来," DAFS技術教育セミナー, pp.23-57, Oct. 1998

#1998030
T. Kuroda, K. Suzuki, S. Mita, T. Fujita, F. Yamane, F. Sano, A. Chiba, Y. Watanabe, K. Matsuda, T. Maeda, T. Sakurai, and T. Furuyama, "Variable supply-voltage scheme for low-power high-speed CMOS digital design," IEEE Journal of Solid-State Circuits, Vol.33, No.3, pp.454-462, Mar. 1998 (PDF)

#1998031
W. Bidermann and T. Sakurai, "Foreword," IEEE Journal of Solid-State Circuits, Vol.33, No.5, pp.674-675, May 1998 (PDF)

#1998032
桜井貴康, "半導体集積回路（VLSI）の挑戦," 生産研究, 50, 10, pp.28-34, Oct. 1998 (PDF)

#1998033
K. Nose and T. Sakurai, "Closed-Form Expressions for Short-Circuit Power Short-Channel CMOS Gates and Its Scaling Characteristics," International Technical Conference on Circuits/Systems, Computers and Communications, pp.1741-1744, July 1998 (PDF)

#1998034
井高康仁, 桜井貴康, "微細化されたLSIにおけるツリー構造配線への最適リピータ挿入," 修士論文, 東京大学, Feb. 1999 (PDF)

#1998035
野瀬浩一, 桜井貴康, "低消費電力CMOS LSI実現に向けた消費電力の解析的最適化手法とマイクロIDDQテスト," 修士論文, 東京大学, 1999

#1998036
桜井貴康, "高性能・低消費電力のULSIにおけるCMPへの期待," , 1998

#1998037
桜井貴康, "設計の視点から見たＳＯＩ技術," JST Forum, 1999

#1998038
T. Sakurai, "Challenges in VLSI Design ower and Interconnection," TI Symposium, 1998

#1998039
桜井貴康, "CMOS LSIのお話," 情報処理, 1998

#1998040
T. Sakurai, "Moore's Law : when to break?," IEEE Symposia on VLSI Technology and Circuits, 1998

#1998041
T. Sakurai, "LSI’s toward the Year 2010," Tutorial, Sendai, 1998

1997

#1997001
川口博, "LSIの低消費電力化," 東京大学生産技術研究所第6回技術発表会技術官等による技術報告書, 1997 (PDF)

#1997002
桜井貴康, "2010年のVLSIに向けての設計," DA Show, 1997

#1997003
桜井貴康, "CMOS LSIの技術動向｢高集積化に向けた課題」," , 1997

#1997004
黒田忠広, 桜井貴康, "マルチメディアCMOSVLSIのための低消費電力回路設計技術（招待論文）," 電子情報通信学会誌, May 1997 (PDF)

#1997005
I. A. Young and T. Sakurai, "Editorial," IEEE Journal of Solid-State Circuits, Vol.32, No.5, pp.618-620, May 1997 (PDF)

#1997006
桜井貴康, "2010年のVLSIを目指して," 固体エレクトロニクス・オプトエレクトロニクス研究発表会, 東京大学, pp.63-72, Feb. 1998

#1997007
T. Kuroda and T. Sakurai, "Low-Power Circuit Design (invited)," Asia and South Pacific Design Automation Conference, 1, Jan. 1997

#1997008
T. Sakurai , T. Kuroda, "Low-Power Circuit Design for Multimedia LSI's (invited)," European Design and Test Conference, Mar. 1997

#1997009
K. Okada and T. Sakurai, "Audio and Video DSPs," IEEE Custom Integrated Circuits Conference, pp.223, May 1997

#1997010
T. Sakurai and T. Kuroda, "Low Voltage Technology and Circuits (invited)," Mead Microelectronics Conference, Lausanne, Switzerland, June 1997

#1997011
H. Kawaguchi and T. Sakurai, "A Reduced Clock-Swing Flip-Flop( RCSFF ) for 63% Clock Power Reduction," Symposium on VLSI Circuits, pp.97-98, June 1997 (PDF)

#1997012
T. Sakurai, H. Kawaguchi, and T. Kuroda, "Low-Power CMOS Design through VTH Control and Low-Swing Circuits (invited)," Digest International Symposiumon Low-Power Electronics and Design, pp.1-6, Sep. 1997 (PDF)

#1997013
H. Kawaguchi and T. Sakurai, "Noise Expressions for Capacitance-Coupled Distributed RC Lines," ACM / IEEE International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems, pp.270-279, Dec. 1997 (PDF)

#1997014
H. Kawaguchi and T. Sakurai, "Delay and Noise Formulas for Capacitively Coupled Distributed RC Lines," Asia and South Pacific Design Automation Conference, pp.35-43, Feb. 1998

#1997015
桜井貴康, "システムLSIの未来と半導体の限界," 日本経済新聞, Oct. 28, 1997 (PDF)

#1997016
川口博, 桜井貴康, "Serially Insertion of Cut-off MOSFET CMOS ( SCCMOS )による低消費電力化," 平成9年春季第44回応用物理学関係連合講演会講演予稿集, pp.744, Mar. 1997 (PDF)

#1997017
桜井貴康, "LSI配線に関する課題と解決策へ向けての展望," 日本電子工業振興協会0.01um LSIに向けたシンポジウム, pp.52-65, May 1997

#1997018
桜井貴康, "マルチメディアLSIと低消費電力設計技術," 応用物理学会スクールSiデバイスの新機軸, pp.73-91, Oct. 1997

#1997019
桜井貴康, "マルチメディアLSIと低消費電力設計," 超集積化デバイス・システム第165委員会第4回研究会資料, pp.17-24, Oct. 1997

#1997020
桜井貴康, "マルチメディアVLSI画像（メディアプロセッサ）," 電子情報通信学会・生涯教育講座, Oct. 1997

#1997021
竹内誠二, 桜井貴康, "高密度VLSI神経回路網の設計," 応用物理学関係連合講演会, Mar. 1998

#1997022
H. Kawaguchi, K. Nose, and T. Sakurai, "A CMOS Scheme for 0.5V Supply Voltage with Pico-Ampere Standby Current," 電気学会・極微構造集積デバイス調査専門委員会, Mar. 1998

#1997023
桜井貴康, "マルチメディアLSIと低消費電力設計技術," 日本電子工業振興協会・産業技術懇談会, Jan. 1997

#1997024
桜井貴康, "設計力の課題," 日本電子工業振興協会, DA-WG, Feb. 1997

#1997025
桜井貴康, "これからの低電圧・低消費電力デバイスを考える," Breakthrough, Mar. 1997

#1997026
桜井貴康, "システムLSI設計概論," Design Automation show 基調講演, B1, July 1997

#1997026
桜井貴康, 黒田忠広, "マルチメディアLSIのための低消費電力回路設計技術," ISS産業科学システムズ, Apr. 1997

#1997027
桜井貴康, "CMOS LSIを理解する," Triceps, pp.1-114, Aug. 1997

#1997027
桜井貴康, "マルチメディアLSIと低消費電力設計技術," シリコンナノエレクトロニクス研究会, pp.1-46, June 1997

#1997028
桜井貴康, "低電圧化の技術のトレンド," 日本工業技術センター, pp.1-37, Sep. 1997

#1997029
桜井貴康, "LSIの低消費電力化・高速化技術とその実際例," 日本テクノセンター, pp.1-44, Dec. 1997

#1997030
桜井貴康, 黒田忠広, "低電力CMOS LSI技術," ISS産業科学システムズ, pp.1-33, Jan. 1998

#1997031
桜井貴康, "軽い振動で動くLSI," 日本経済新聞, June 14, 1997 (PDF)

#1997032
桜井貴康, "消費電力13-30%低減," 日本産業新聞, July 22, 1997 (PDF)

#1997033
桜井貴康, "変革迫られる半導体産業," 日本産業新聞, Aug. 18, 1997 (PDF)

#1997034
桜井貴康, "システムLSIで新たな付加価値創造," 日本産業新聞, Aug. 18, 1997 (PDF)

#1997035
桜井貴康, "ブレークスルーを模索," 日本産業新聞, Aug. 19, 1997 (PDF)

#1997036
桜井貴康, "ビジネスと技術の両立をめざし," 日本産業新聞, Aug. 19, 1997 (PDF)

#1997037
桜井貴康, "回路設計で消費電力を大幅削減," 半導体産業新聞, Aug. 27, 1997 (PDF)

1996

#1996001
H. Hara, M. Matsui, G. Otomo, K. Seta, and T. Sakurai, "Special and Embedded Memory Macrocells for Low-Cost and Low-Power in MPEG Environment," IEICE Transactions on Electronics, Vol.E79-C, No.6, pp.750-756, June 1996 (PDF)

#1996002
A. Parameswar, H. Hara, and T. Sakurai, "A Swing Restored Pass-Transistor Logic Based Multiply and Accumulate Circuit for Multimedia Applications," IEEE Journal of Solid-State Circuits, Vol.31, No.6, pp.804-809, June 1996 (PDF)

#1996003
T. Kuroda and T. Sakurai, "Threshold-Voltage Control Schemes through Substrate-Bias for Low-Power High-Speed CMOS LSI Designs (invited)," Journal of VLSI Signal Processors, Vol.13, No.2/3, pp.191-201, Aug. 1996

#1996004
T. Kuroda, T. Fujita, S. Mita, T. Nagamatsu, S. Yoshioka, K. Suzuki, F. Sano, M. Norishima, M. Murota, M. Kako, M. Kinugawa, M. Kakumu, and T. Sakurai, "A 0.9-V, 150-MHz 10-mW 4mm2 2-D Discrete Cosine Transform Core Processor with Variable Threshold-Voltage (VT) Scheme," IEEE Journal of Solid-State Circuits, Vol.31, No.11, pp.1770-1779, Nov. 1996 (PDF)

#1996005
T. Kuroda, T. Fujuta, T. Nagamatsu, S. Yoshioka, T. Sei, K. Matsumoto, Y. Hamura, T. Mori, M. Murota, M. Kakumu, and T. Sakurai, "A High-Speed Low-Power 0.3um CMOS Gate Array with Variable Threshold Voltage (VT) Scheme," IEEE Custom Integrated Circuits Conference, pp.53-56, May 1996

#1996006
T. Sakurai, "Video, Image and Speech Digital Signal Processing," IEEE Custom Integrated Circuits Conference, pp.349, May 1996

#1996007
K. Suzuki, T. Kuroda, T. Fujita, S. Mita, T. Nagamatsu, S. Yoshioka, F. Sano, M. Norishima, M. Murota, M. Kato, M. Kinugawa, M. Kakumu, and T. Sakurai, "A 0.9V 150MHz 10mW 4mm2 2-D Discrete Cosine Transform Core Processor with Variable-Threshold-Voltage (VT) Scheme," 4th International Workshop on Advanced LSI's, pp.150-158, July 1996

#1996008
T. Sakurai and T. Kuroda, "Achieving Low-Power Through Control of Threshold Voltage (invited)," XXXVth General Assembly of the International Union of Radio Science (URSI) Abstracts, pp.168, Aug. 1996

#1996009
T. Kuroda, T. Fujita, S. Mita, T. Mori, K. Matsuo, M. Kakumu, and T. Sakurai, "Substrate Noise Influence on Circuit Performance in Variable Threshold-Voltage Scheme," International Symposium on Low Power Electronics and Design, pp.309-312, Oct. 1996 (PDF)

#1996010
T. Sakurai and T. Kuroda, "Tutorial on Low-Power Design Methodology (invited)," Proc. of the Synthesis and System Integration of Mixed Technologies (SASIMI), pp.3-10, Nov. 1996

#1996011
桜井貴康, "マルチメディアLSIと低消費電力設計技術," 日本電子工業振興協会専業技術懇談会, Jan. 1997

#1996012
T. Sakurai and T. Kuroda, "Low-Power Circuit Design for Multimedia LSI's," European Design and Test Conference, Mar. 1997

#1996013
T. Sakurai and T. Kuroda, "Low-Voltage Technology and Circuits (invited)," Mead Microelectronics Conference, Mar. 1997

#1996014
桜井貴康, "設計力の課題," 日本電子工業振興協会 DA-WG, Feb. 1997

#1996015
T. Takayanagi, K. Nogami, F. Hatori, N. Hatanaka, M. Takahashi, M. Ichida, S. Kobayashi, T. Takayanagi, K. Nogami, F. Hatori, N. Hatanaka, M. Takahashi, M. Ichida, S. Kobayashi, T. Higashi, M. Klein, J. Thomson, R. Carpenter, R. Donthi, D. Renfrow, J. Zheng, L. Tinkey, B. Maness, J. Battle, S. Purcell, and T. Sakurai, "350MHz Time-Multiplexed 8-Port SRAM and Word-Size Variable Multiplier for Multimedia DSP," IEEE International Solid-State Circuits Conference, 9.4, pp.150-151, Feb. 1996 (PDF)

#1996016
Y. Unekawa, K. Fkuda, K. Sakue, T. Nakao, S. Yoshioka, T. Nagamatsu, H. Nakakita, Y. Kaneko, M. Motomiya, Y. Ohba, K. Ise, M. Ono, K. Fujiwara, Y. Miyazawa, T. Kuroda, Y. Kamitani, T. Sakurai, and A. Kanuma, "A 5Gb/s 8 x 8 ATM Switch Element CMOS LSI Supp. Rting Five Quality-Of-Service Classes with 200MHz LVDS Interface," IEEE International Solid-State Circuits Conference, 7.3, pp.118-119, Feb. 1996 (PDF)

#1996017
T. Kuroda, T. Fujita, S. Mita, T. Nagamatsu, S. yoshioka, F. Sano, M. Norishima, M. Murota, M. Kato, M. Kinugawa, M. Kakumu, and T. Sakurai, "A 0.9V 150MHz 10mW 4mm2 2-D Discrete Cosine Transform Core Processor with Variable-Threshold-Voltage Scheme," IEEE International Solid-State Circuits Conference, 10.3, pp.166-167, Feb. 1996 (PDF)

#1996018
K. Seki, Y. Unekawa, K. Sakue, T. Nakano, S. Yoshida, T. Nagamatsu, H. Nakakita, Y. Kaneko, M. Motoyama, Y. Ohba, K. Ise, M. Ono, K. Fujikawara, Y. Miyazawa, T. Kuroda, Y. Kamatani, T. Sakurai, and A. Kanuma, "A 5Gb/s ATM Switch Element CMOS LSI Supporting 5 Quality-of-Service Classes with 200MHz LVDS Interface," Technical Report of IEICE, ED96-51, pp.57-64, June 1996

#1996019
藤田哲也, 黒田忠弘, 三田真二, 永松徹, 吉岡晋一, 佐野文彦, 法島政之, 室田雅之, 加古真琴, 衣川正明, 各務正一, 桜井貴康, "A 0.9V 150MHz 10mW 4mm2 2-D Discrete Cosine Transform Core Professor with Variable-Threshold-Voltage(VT) Scheme," 電子情報通信学会集積回路研究会信学技法, ED96-49/SDM96-32/ICD96-52, pp.43-48, June 1996

#1996020
桜井貴康, 黒田忠弘, "マルチメディアLSIと低消費電力設計技術（招待）," 電気学会第43回半導体専門講座, pp.1-32, July 1996

#1996021
桜井貴康, "「マルチメディアVLSI画像」（メディアプロセッサ）," 電子情報通信学会生涯教育講座, Oct. 1996

#1996022
桜井貴康, "メディアプロセッサ," 電子情報通信学会 LSI設計技術の未来を考える琵琶湖ワークショップ, pp.85-108, Nov. 1996

#1996023
桜井貴康, "マルチメディアLSIのための低消費電力回路設計技術," 日本電子工業振興協会マイクロコンピューターに関する調査研究報告書, 96-シ-1, pp.24-39, Apr. 1996

#1996024
桜井貴康, "マルチメディアLSIのための低消費電力回路設計技術," 日本電子工業振興協会超集積先端システム調査研究報告書Ⅱ, 96-基―10, pp.48-53, Apr. 1996

#1996025
桜井貴康, "LSI敗戦に関する課題と解決策へ向けての展望," 日本電子工業振興協会最先端加工WG, Apr. 1996

#1996026
桜井貴康, "メディアプロセッサの開発と応用," 日本工業技術センター, pp.43-65, May 1996

#1996027
桜井貴康, "低消費電力LSI開発とその環境," Electronic Journal, pp.13, Aug. 1996

#1996028
桜井貴康, "マルチメディアと省消費電力設計技術," 日本電子工業振興協会, Sep. 1996

#1996029
桜井貴康, 黒田忠弘, "LSIの低消費電力化・高速化技術," 日本テクノセンター, pp.1-44, Dec. 1996

#1996030
桜井貴康, "マルチメディアLSIと低消費電力設計技術," 日本電子工業振興協会, Sep. 1996

1995

#1995001
K. Seta, H. Hara, T. Kuroda, M. Kakumu, and T. Sakurai, "50% Active Power Saving without Speed Degradation Using Standby Power Reduction (SPR) Circuit," IEEE International Solid-State Circuits Conference, 19.4, pp.318-319, Feb. 1995 (PDF)

#1995002
T. Sakurai and T. Kuroda, "Outline of Low-Power LSI Design(invited)," 電子情報通信学会総合大会, Mar. 1995

#1995003
T. Kuroda and T. Sakurai, "Overview of Low-Power ULSI Circuit Techniques(invited)," IEICE Transactions on Electronics, Vol.E78-C, No.4, pp.334-344, Apr. 1995 (PDF)

#1995004
T. Sakurai and T. Kuroda, "Tutorial on Low-Power LSI Design(invited)," the 8th Karuizawa Workshop on Circuits and Systems, pp.209-214, Apr. 1995

#1995005
T. Kuroda and T. Sakurai, "Low-Power Circuit Design using Pass-Transistor Logic and Substrate-bias Control(invited)," the 8th Karuizawa Workshop on Circuits and Systems, pp.215-220, Apr. 1995

#1995006
G. Otomo, H. Hara, T. Oto, K. Seta, K. Kitagaki, S, Ishiwata, S. Michinaka, T. Shimazawa, M. Matsui, T. Demura, M. Koyama, Y. Watanabe, F. Sano, A. Chiba, K. Matsuda, and T. Sakurai, "Special Memories and Embedded Memories in MPEG Environments(invited)," IEEE Custom Integrated Circuits Conference, 8.1, May 1995

#1995007
T. Sakurai and T. Kuroda, "Lecture on Low-Power VLSI Design(invited)," Japan Industrial Engineering Center Seminar, July 1995

#1995008
T. Sakurai, "Tutorial on Low-Power Circuit Design Methodology(invited)," Asia and South Pacific Design Automation Conference, Aug. 1995

#1995009
A. Chiba, K. Matsuda, Y. Watanabe, G. Otomo, H. Hara, M. Matsui, and T. Sakurai, "Special Memory and Embedded Memory Macrocells in Multimedia LSI's(invited)," Technical Report of IEICE, ICD95-77, pp.51-57, Aug. 1995

#1995010
T. Sakurai, "Low-Power Circuit Design for Multimedia(invited)," Proc. of the International Conference on VLSI and CAD (ICVC), pp.37-42, Oct. 1995

#1995011
F. Sano, A. Chiba, K. Matsuda, Y. Watanabe, G. Otomo, H. Hara, M. Matsui, and T. Sakurai, "Design Methodology for Special Purpose Memories in Multimedia LSI's and its Application to MPEG2 Decoder(invited)," Technical Report of IEJ, ECT-95-61, pp.29-38, Sep. 11, 1995

#1995012
T. Sakurai and T. Kuroda, "Design Methodology for Low-Power and High-Speed VLSI Design(invited)," Japan Industrial Engineering Center Seminar, Nov. 28, 1995

#1995013
T. Kuroda and T. Sakurai, "Low-Power Design Techniques(invited)," Japan Industrial Engineering Center Seminar, Nov. 28, 1995

1994

#1994001
Y. Unekawa, T. Kobayashi, T. Shirotori, Y. Fujimoto, T. Shimazawa, K. Nogami, T. Nakao, K. Sawada, M. Matsui, T. Sakurai, M. K.Tang, and B. Huffman, "A 110-MHz/1-Mb Synchronous TagRAM," IEEE Journal of Solid-State Circuits, Vol.29, No.4, pp.403-410, Apr. 1994 (PDF)

#1994002
M. Matsui, H. Hara, K. Seta, Y. Uetani, L. Kim, T. Nagamatsu, T. Shimazawa, S. Mita, G. Otomo, T. Oto, Y. Watanabe, F. Sano, A. Chiba, K. Matsuda, and T. Sakurai, "200MHz Video Compression Macrocells Using Low-Swing Differential Logic," IEEE International Solid-State Circuits Conference, 4.6, pp.76-77, Feb. 1994 (PDF)

#1994003
T. Demura, T. Oto, K. Kitagaki, S. Ishiwata, G. Otomo, S. Michinaka, N. Goto, M. Matsui, H. Hara, T. Nagamatsu, K. Seta, T. Shimazawa, K. Maeguchi, T. Odaka, Y. Uetani, T. Oku, T. Yamakage, and T. Sakurai, "A Single-Ship MPEG2 Decoder LSI," IEEE International Solid-State Circuits Conference, 4.4, pp.72-73, Feb. 1994 (PDF)

#1994004
A. Parameswar, H. Hara, and T. Sakurai, "A High-Speed, Low-Power, Swing Restored Pass-Transistor Logic Based Multiply and Accumulate Circuit for Multimedia Applications," IEEE Custom Integrated Circuits Conference, pp.278-281, May 1, 1994

#1994005
T. Takayanagi, K. Sawada, T. Sakurai, Y. Parameshwar, S. Tanaka, N. Ikumi, M. Nagamatsu, Y. Kondo, K. Minagawa, J. Brennan, P. Hsu, P. Rodman, J. Bratt, J. Scanlon, M. Tang, C. Joshi, and M. Nofal, "Embedded Memory Design for a Four Issue Superscaler RISC Microprocessor(invited)," IEEE Custom Integrated Circuits Conference, pp.585-590, May 1994

#1994006
T. Kobayashi, and T. Sakurai, "Self-Adjusting Threshold-Voltage Scheme (SATS) for Low-Voltage High-Speed Operation," IEEE Custom Integrated Circuits Conference, pp.271-274, May 1994

#1994007
K. Shimazawa, T. Sakurai et al, "200MHz Video Compression / Decompression Macro-cells using Sense-Amplifying Flip-Flops," Technical Report of IEICE, CPSY94-9, pp.57-64, Apr. 1994

#1994008
G. Ootomo, K. Kitagaki, T. Demura, S. Ishiwata, S. Michinaka, T. Oto, and T. Sakurai, "Development of MPEG2 Video Decoder LSI," Technical Report of IEICE, ICD94-83, pp.25-32, Aug. 1994

#1994009
M. Matsui, H. Hara, Y. Uetani, L. Kim, T. Nagamatsu, Y. Watanabe, A. Chiba, K. Matsuda, and T. Sakurai, "A 200MHz 13mm2 2-D DCT Macrocell Using Sense-Amplifying Pipeline Flip-Flop Scheme," IEEE Journal of Solid-State Circuits, Vol.29, No.12, pp.1482-1490, Dec. 1994 (PDF)

#1994010
I. Young and T. Sakurai, "Future high performance microprocessor implementation tradeoffs," Symposium on VLSI Circuits, Panel discussion, pp.49, June 1994 (PDF)

1993

#1993001
Y. Unekawa, T. Kobayashi, T. Shirotori, Y. Fujimoto, T. Shimazawa, K. Nogami, T. Nakao, K. Sawada, M. Matsui, T. Sakurai, M. K.Tang, and B. Huffman, "A 110MHz/1Mbit Synchronous TagRAM," Symposium on VLSI Circuits, pp.15-16, 1993 (PDF)

#1993002
F. Hatori, T. Sakurai, K. Nogami, K. Sawada, M. Takahashi, M. Ichida, M. Uchida, I. Yoshii, Y. Kawahara, Y. Hibi, Y. Saeki, H. Muroga, A. Tanaka, and K. Kanzaki, "Introducing Redundancy in Field Programmable Gate Arrays," IEEE Custom Integrated Circuits Conference, pp.7.1.1-7.1.4, May 1993

#1993003
T. Sakurai, "High Speed / High-Density Logic Circuit Design(invited)," International Symposium on VLSI Technology, Systems, and Applications, Taiwan, pp.222-226, May 12-14, 1993

#1993004
T. Sakurai, "High-Speed Circuit Design with Scaled-Down MOSFET's and Low Supply Voltage(invited)," IEEE International Symposium on Circuit and Systems, Chicago, pp.1487-1490, May 1993 (PDF)

#1993005
T. Sakurai, "Closed-Form Expressions for Interconnection Delay, Coupling and Crosstalk in VLSI's," IEEE Transactions on Electron Devices, Vol.40, No.1, pp.118-124, Jan. 1993 (PDF)

#1993006
T. Sakurai and A. El Gamal, "Multi-million gate ASIC's," Symposium on VLSI Circuits, Panel discussion, pp.95, May 1993 (PDF)

1992

#1992001
T. Sakurai, "A Unified Theory for Mixed CMOS / BiCMOS Buffer Optimization," IEEE Journal of Solid-State Circuits, Vol.27, No.7, pp.1014-1019, July 1992 (PDF)

#1992002
H. Hara, T. Sakurai, T. Nagamatsu, K. Seta, H. Momose, Y. Niitsu, H. Miyakawa, K. Matsuda, Y. Watanabe, F. Sano, and A. Chiba, "0.5-um 3.3-V BiCMOS Standard Cells with 32-kilobyte Cache and Ten-Port Register File," IEEE Journal of Solid-State Circuits, Vol.27, No.11, pp.1579-1584, Nov. 1992 (PDF)

#1992003
T. Sakurai, "Panel on High Speed I/O," IEEE International Solid-State Circuits Conference, Panel discussion, pp.188, Feb. 1992

#1992004
T. Sakurai, B. Lin and A. R. Newton, "Fast Simulated Diffusion: An Optimization Algorithm for Multi-minimum Problems and Its Application to MOSFET Model Parameter Extraction," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol.11, No.2, pp.228-234, Feb. 1992 (PDF)

#1992005
H. Hara and T. Sakurai et al., "0.5um BiCMOS Standard-Cell Macros Including 0.5W 3ns Register File and 0.6W 5ns 32kB Cache," International Solid-State Circuits Conference, pp.46-47, Feb. 1992 (PDF)

#1992006
K. Seta, H. Hara, T. Sakurai, T. Nagamatsu, Y. Niitsu, H. Miyakawa, K. Matsuda, Y. Watanabe, F. Sano, and A. Chiba, "0.5um BiCMOS Standard Cell Macro's," Technical Report of IEICE, ED92-57, ICD92-42, pp.1-8, Aug. 1992

#1992007
T. Sakurai and H. Kato, "Topics in ISSCC'92," Semiconductor World, Press Journal, pp.36-39, May 1992

#1992008
T. Mori, T. Sakurai et al., "0.5um BiCMOS ASIC Family," IEEE Custom Integrated Circuits Conference, Session2 New Products - High Performance Devices and Test Methodologies, May 1992

#1992009
T. Mori, T. Sakurai et al., "0.5um BiCMOS ASIC Family," Technical Report of IEICE, CAS92-61, ICD92-99, pp.25-32, Nov. 1992

#1992010
M. Takahashi, T. Sakurai, K. Sawada, K. Nogami, and M. Ichida, "3.3V - 5V Compatible I/O Circuit without Thick Gate Oxide," IEEE Custom Integrated Circuits Conference, pp.23.3.1-23.3.4, May 1992

#1992011
T. Sakurai, "A Review on Low-Voltage BiCMOS Circuits and a BiCMOS vs. CMOS Speed Comparison," 35th Midwest Symposium on Circuits and Systems, Washington DC, pp.564-567, Aug. 1992

1991

#1991001
T. Sakurai and A. R. Newton, "Delay Analysis of Series-Connected MOSFET Circuits," IEEE Journal of Solid-State Circuits, Vol.26, No.2, pp.122-131, Feb. 1991 (PDF)

#1991002
T. Sakurai, S. Kobayashi, and M. Noda, "Simple Expressions for Interconnection Delay, Coupling and Crosstalk in VLSI's," IEEE International Symposium on Circuit and Systems, pp.2375-2378, June 1991

#1991003
T. Sakurai and A. R. Newton, "A Simple Short-Channel MOSFET Model and Its Application to Delay Analysis of Inverters and Series-Connected MOSFET's," IEEE International Symposium on Circuit and Systems, TUAM-3-7, May 1990

#1991004
T. Sakurai and A. R. Newton, "A Simple MOSFET Model for Circuit Analysis," IEEE Transactions on Electron Devices, Vol.38, No.4, pp.887-894, Apr. 1991 (PDF)

#1991005
T. Sakurai, "A Unified Theory for Mixed CMOS / BiCMOS Buffer Optimization," IEEE European Solid-State Circuits Conference, pp.129-132, Sep. 1991

#1991006
T. Nagamatsu, T. Sakurai, H. Hara, S. Kobayashi, K. Seta, M. Noda, M. Uchida, Y. Watanabe, and F. Sano, "A 1.9ns BiCMOS CAM Macro with Double Match Line Architecture," IEEE Custom Integrated Circuits Conference, pp.14.3.1-14.3.4, May 1991

#1991007
H. Hara, T. Sakurai, M. Noda, T. Nagamatsu, S. Kobayashi, K. Seta, H. Momose, Y. Niitsu, H. Miyakawa, K. Maeguchi, Y. Watanabe, and F. Sano, "0.5um 2M-Transistor BiPNMOS Channelless Gate Array," IEEE International Solid-State Circuits Conference, 9.1, pp.148-149, Feb. 1991 (PDF)

#1991008
T. Sakurai, "Panel on Silicon Integrated Systems Beyond Half Micron," IEEE International Solid-State Circuits Conference, Panel discussion, pp.197, Feb. 1991

#1991009
T. Sakurai, M. Ichida and A. R. Newton, "Fast Simulated Diffusion: An Optimization Algorithm for Multi-Minimum Problems and Its Application to MOSFET Model Parameter Extraction," IEEE Custom Integrated Circuits Conference, pp.8.8.1-8.8.4, May 1991

#1991010
H. Hara, T. Sakurai, H. Miyakawa, K. Seta, and Y. Watanabe, "0.5um 3.3V BiPNMOS Gate Array," Technical Report of IEICE, CAS91-38, SDM91-43, ICD91-47, pp.71-76, June 1991

#1991011
H. Hara, T. Sakurai, M. Noda, T. Nagamatsu, K. Seta, H. Momose, Y. Niitsu, H. Miyakawa, and Y. Watanabe, "0.5-um 2M-Transistor BiPNMOS Channelless Gate Array," IEEE Journal of Solid-State Circuits, Vol.26, No.11, pp.1615-1620, Nov. 1991 (PDF)

1990

#1990001
T. Sakurai and A. R. Newton, "Alpha-Power Law MOSFET Model and Its Application to CMOS Inverter Delay and Other Formulas," IEEE Journal of Solid-State Circuits, Vol.25, No.2, pp.584-594, Apr. 1990 (PDF)

#1990002
T. Sakurai and A. R. Newton, "A Simple MOSFET Model for Circuit Analysis and Its Application to CMOS Gate Delay Analysis and Series-Connected MOSFET Structure," Dept. EECS, Univ. of Calif., Berkeley, pp.ERL Memo M90/19, Mar. 1990 (PDF)

#1990003
T. Sakurai and A. R. Newton, "MOSFET Model Parameter Extraction Based on Fast Simulated Diffusion," Dept. EECS, Univ. of Calif., Berkeley, pp.ERL Memo M90/20, Mar. 1990 (PDF)

#1990004
T. Sakurai and A. R. Newton, "Multiple-Output Shared Transistor Logic (MOSTL) Family Synthesized Using Binary Decision Diagram," Dept. EECS, Univ. of Calif., Berkeley, pp.ERL Memo M90/21, Mar. 1990 (PDF)

#1990005
T. Sakurai, "High-Speed Circuit Design," IEEE Custom Integrated Circuits Conference, Educational Session E2.1, May 1990

#1990006
K. Nogami, T. Sakurai, K. Sawada, K. Sakaue, Y. Miyazawa, S. Tanaka, Y. Hiruta, K. Katoh, T. Takayanagi, T. Shirotori, Y. Itoh, M. Uchida, and T. Iizuka, "A 9-ns HIT-delay 32-kbyte cache macro for high-speed RISC," IEEE Journal of Solid-State Circuits, Vol.25, No.1, pp.100-108, Feb. 1990 (PDF)

1989

#1989001
K. Nogami, T. Sakurai, K. Sawada, K. Sakaue, Y. Miyazawa, S. Tanaka, Y. Hiruta, K. Katoh, T. Takayanagi, T. Shirotori, Y. Itoh, M. Uchida, and T. Iizuka, "Circuit design of a 9ns-HIT-delay 32K byte cache macro," Symposium on VLSI Circuits, pp.45-46, May 1989 (PDF)

1988

#1988001
T. Sakurai, "Optimization of CMOS Arbiter and Synchronizer with Sub-micron MOSFETs," IEEE Journal of Solid-State Circuits, Vol.23, No.4, pp.901-906, Aug. 1988 (PDF)

#1988002
K. Sawada, T. Sakurai, K. Nogami, T. Iizuka, Y. Uchino, Y. Tanaka, T. Kobayashi, K. Kawagai, Y. Shiotari, Y. Itabashi, and S. Kohyama, "A 72K CMOS Channelless Gate Array with Embedded 1Mbit Dynamic RAM," IEEE Custom Integrated Circuits Conference, pp.20.3.1-20.3.4, May 1988 (PDF)

#1988003
T. Sakurai, K. Nogami, K. Sawada, and T. Iizuka, "Transparent-Refresh DRAM (TReD) Using Dual-Port DRAM Cell," IEEE Custom Integrated Circuits Conference, pp.4.3.1-4.3.4, May 1988 (PDF)
(PDF)
#1988004
T. Sakurai, K. Nogami, K. Sawada, T. Shirotori, T. Takayanagi, T. Iizuka, T. Maeda, J. Matsunaga, H. Fuji, K. Maeguchi, K. Kobayashi, T. Ando, Y. Hayakashi, A. Miyoshi, and K. Sato, "A Circuit Design of 32KByte Integrated Cache Memory," Symposium on VLSI Circuits, pp.45-46, Aug. 1988 (PDF)

#1988005
K. Nogami, T. Sakurai, K. Sawada, T. Shirotori, T. Takayanagi, T. Iizuka, T. Maeda, J. Matsunaga, H. Fuji, K. Maeguchi, K. Kobayashi, T. Ando, Y. Hayakashi, A. Miyoshi, and K. Sato, "Architecture and Design Methodology of 32KByte Integrated Cache Memory," IEEE European Solid-State Circuits Conference, Sep. 1988

#1988006
T. Sakurai, K. Nogami, K. Sawada, T. Shirotori, T. Takayanagi, T. Iizuka, T. Maeda, J. Matsunaga, H. Fuji, K. Maeguchi, K. Kobayashi, T. Ando, Y. Hayakashi, A. Miyoshi, and K. Sato, "32KByte Integrated Cache Memory," 電子通信学会秋季大会, Sep. 1988

#1988007
K. Sawada, T. Sakurai, K. Nogami, T. Iizuka, Y. Uchino, Y. Tanaka, T. Kobayashi, K. Kawagai, Y. Shiotari, Y. Itabashi, and S. Kohyama, "1Mbit Dynamic RAM embedded in 72K CMOS Track-Free Gate Array," 電子通信学会秋季大会, Sep. 1988

#1988008
T. Sakurai, K. Nogami, K. Sawada, and T. Iizuka, "Transparent-Refresh DRAM Macro for ASMIC," 電子通信学会秋季大会, Sep. 1988

#1988009
T. Iizuka, T. Sakurai, J. Matsunaga, K. Maeguchi, K. Kawagai, T. Kobayashi, Y. Shiotari, M. Ogura, K. Kobayashi, and A. Miyoshi, "Technical Trend of Application Specific Memory," 電子通信学会秋季大会, Sep. 1988

#1988010
T. Iizuka, T. Sakurai, J. Matsunaga, K. Maeguchi, K. Kawagai, T. Kobayashi, Y. Shiotari, K. Kobayashi, and T. Miyoshi, "Large Memory Embedded ASICs (Invited)," International Conference on Computer Design, Dec. 1988

#1988011
T. Sakurai, "CMOS Inverter Delay and Other Analytical Formulas Using a-Power Law MOS Model," International Conference on Computer Aided Design, pp.74-77, Nov. 1988 (PDF)

1987

#1987001
T. Sakurai, "Panel on Digital ICs with Embedded Memory," IEEE International Solid-State Circuits Conference, Panel discussion, pp.239, Feb. 1987

#1987002
T. Sakurai, K. Sawada, K. Nogami, T. Wada, K. Sato, M. Kakumu, S. Morita, M. Kinugawa, T. Asami, K. Narita, J. Matsunage, A. Higuchi, and T. Iizuka, "A 36ns 1Mbit Pseudo SRAM with VSRAM mode," Symposium on VLSI Circuits, pp.45-46, May 1987 (PDF)

#1987003
K. Nogami, K. Sawada, M. Kinugawa, and T. Sakurai, "VLSI Circuit Reliability under AC Hot-Carrier Stress," Symposium on VLSI Circuits, pp.13-14, May 1987 (PDF)

#1987004
T. Sakurai, "Simulation Technique for Developing Ultra High Speed MOS LSI," Three Hour Lecture held by Giken-Joho Center, June 22, 1986

#1987005
K. Sawada, T. Sakurai, K. Nogami, T. Shirotori, M. Isobe, A. Higuchi, and T. Iizuka, "Design and Evaluation of 1Mbit Pseudo/Virtually Static RAM," 電子通信学会回路とシステム研究会, CAS87-108, Aug. 1987

#1987006
T. Sakurai, K. Sawada, and K. Nogami, "Optimization of CMOS Arbiter/Synchronizer and Its Application to Submicron Devices," 電子通信学会回路とシステム研究会, CAS87-107, Aug. 1987 (PDF)

#1987007
K. Nogami and T. Sakurai, "A Drivability Compensated Output Buffer," 電子通信学会総合大会, pp.1-130, Oct. 1987

#1987008
K. Sawada, T. Sakurai, K. Nogami, K. Sato, T. Shirotori, M. Kakumu, S. Morita, M. Kinugawa, T. Asami, K. Narita, J. Matsunaga, A. Higuchi, and T. Iizuka, "A 30-uA Data-Retention Pseudostatic RAM with Virtually Static RAM Mode," IEEE Journal of Solid-State Circuits, Vol.23, No.1, pp.12-19, Feb. 1988 (PDF)

#1987009
T. Sato, N. Yamada, and T. Sakurai, "Topics of ISSCC'87," Denshi-Zairyou, pp.139-145, June 1987

#1987010
K. Sawada, T. Sakurai, K. Nogami, T. Shirotori, M. Isobe, A. Higuchi, and T. Iizuka, "Design and Evaluation of 1Mbit Pseudo/Virtually Static RAM," Circuit and System Research Group of IECE of Japan, CAS87-108, Aug. 1987

#1987011
T. Sakurai, "Problems and Solutions for MOS LSI Circuit Simulation," Three Hour Lecture, Giken-Joho Center, July 23, 1986

#1987012
D. R.Asdsen, J. J.Barnes, B. Barton, S. Chan, D. Draper, P. A.Reed, T. Sakurai, "Digital ICs with Embedded Memory," IEEE International Solid-State Circuits Conference, International discussion 6, Feb. 26, 1987 (PDF)
(PDF)

1986

#1986001
T. Sakurai, K. Sawada, K. Nogami, T. Wada, M. Isobe, M. Kakumu, S. Morita, M. Yokogawa, M. Kinugawa, T. Asami, K. Hashimoto, J. Matsunage, H. Nozawa, and T. Iizuka, "A 1Mb Virtually SRAM," IEEE International Solid-State Circuits Conference, pp.252-253, Feb. 1986 (PDF)

#1986002
T. Sakurai, K. Nogami, M. Kakumu, and T. Iizuka, "Hot-Carrier Generation in Submicrometer VLSI Environment," IEEE Journal of Solid-State Circuits, Vol.21, No.1, pp.187-192, Feb. 1986 (PDF)

#1986003
K. Nogami, T. Sakurai, K. Sawada, T. Wada, M. Isobe, M. Kakumu, S. Morita, M. Yokogawa, M. Kinugawa, T. Asami, K. Hashimoto, J. Matsunage, H. Nozawa, and T. Iizuka, "A 1Mb Virtually Static RAM," IEEE Journal of Solid-State Circuits, Vol.21, No.5, pp.662-669, Oct. 1986 (PDF)

#1986004
K. Sawada, T. Sakurai, K. Nogami, T. Wada, M. Isobe, and T. Iizuka, "Self-Aligned Refresh Scheme for VLSI Intelligent Dynamic RAMs," Symposium on VLSI Technology, pp.85-86, May 1986 (PDF)
(PDF)

#1986005
T. Sakurai, T. Furuyama, and T. Sato, "Remarkable Papers in ISSCC'86," Denshi-Zairyou, pp.123-129, June 1986

#1986006
T. Sakurai, M. Kakumu, and K. Sato, "1Mbit Virtually Static RAM," Toshiba Review, 41, 3, pp.227-230, 1986 (PDF)
(PDF)

#1986007
T. Sakurai, "Practical Example of VLSI Circuit Simulation," Three Hour Lecture held by Giken-Joho Center, Dec. 5, 1986

#1986008
桜井貴康, 沢田和宏, 野上一孝, 和田哲典, 磯部満郎, 飯塚哲哉, "Virtually Static RAMと各種RAMの比較," 電子情報通信学会総合全国大会, 1986 (PDF)
(PDF)

1985

#1985001
T. Sakurai, M. Kakumu, and T. Iizuka, "Hot-Carrier Suppressed VLSI with Submicron Geometry," IEEE International Solid-State Circuits Conference, pp.272-273, Feb. 1985 (PDF)

#1985002
T. Sakurai and T. Iizuka, "Modeling of Substrate Current in MOS Circuit," 応用物理学会春季講演会, pp.559, Mar. 1985

#1985003
T. Sakurai and T. Iizuka, "Gate Electrode RC Delay Effects in VLSI's," IEEE Journal of Solid-State Circuits, Vol.20, No.1, pp.290-294, Feb. 1985 (PDF)

#1985004
T. Sakurai and T. Iizuka, "Gate Electrode RC Delay Effects in VLSI's," IEEE Transactions on Electron Devices, Vol.32, No.2, pp.370-374, Feb. 1985 (PDF)

#1985005
K. Sawada, T. Sakurai, and T. Iizuka, "On-Chip Battery Backup Circuit for VLSI Static RAMs," International Conference on Solid State Devices and Materials, pp.49-52, 1985

#1985006
T. Sakurai, K. Nogami, and T. Iizuka, "A New Method for CMOS Circuit Delay Estimation," 応用物理学会秋季講演会, pp.495, 1985

#1985007
T. Iizuka, T. Sakurai, and M. Kakumu, "Circuit Cleverness for Protecting MOSFETs from Hot-Carriers," 日経マイクロデバイス, Summer Issue, pp.39-54, June 1985

#1985008
K. Hashimoto, Y. Nagakubo, S. Yokogawa, M. Kakumu, M. Kinugawa, K. Sawada, T. Sakurai, M. Isobe, J. Matsunage, and T. Iizuka, "Deep Trench Well Isolation for 256Kbit CMOS Static RAM," Symposium on VLSI Technology, pp.94-95, May 1985

#1985009
K. Nogami, K. Sawada, T. Sakurai, T. Wada, M. Isobe, and T. Iizuka, "Electron-Beam Tester Evaluation of 1Mbit VSRAM," 電子通信学会総合大会, pp.2-226, 1985

#1985010
T. Sakurai, K. Sawada, K. Nogami, T. Wada, M. Isobe, and T. Iizuka, "Comparison of Virtually Static RAM and Other RAMs," 電子通信学会総合大会, 1985

#1985011
T. Sakurai, K. Nogami, M. Kakumu, and T. Iizuka, "Analysis of Hot Substrate Current Generation in MOS Circuits," Japan Semiconductor Technology Reports, 1, 1, pp.65-67, 1985

1984

#1984001
T. Sakurai and T. Iizuka, "Gate Electrode RC Delay Effects," 電子通信学会総合大会, pp.437, 1984 (PDF)

#1984002
K. Sawada, T. Sakurai, and T. Iizuka, "Access Time Analysis of CMOS Static RAMs," 電子通信学会総合大会, pp.511, 1984

#1984003
T. Sakurai and T. Iizuka, "Measurement of Junction Capacitance using Voltage Followers," 応用物理学会春季講演会, pp.483, 1984

#1984004
T. Sakurai, K. Sawada, and T. Iizuka, "VLSI-oriented Dual Voltage Down Conversion Circuits," 応用物理学会秋季講演会, pp.411, 1984

#1984005
K. Sawada, T. Sakurai, T. Ohtani, M. Isobe, and T. Iizuka, "Electron-Beam Tester Evaluation of 256Kbit CMOS Static RAM with Dynamic Double Word Line," 応用物理学会秋季講演会, pp.389, 1984

#1984006
T. Sakurai, K. Sawada, and T. Iizuka, "VLSI-oriented Voltage Down Conversion Circuits with Sub-Main Configuration," Late News Abstract of the International Conference on Solid State Devices & Materials, LC-12-7, pp.74, 1984 (PDF)

#1984007
K. Sawada, T. Sakurai, T. Ohtani, M. Isobe, and T. Iizuka, "Pursuit of High Performance High Density SRAM -- Dynamic Double Word Line Approach," 電子通信学会半導体デバイス・トランジスタ研究会, SSD84-22, pp.59-64, May 1984

#1984008
M. Isobe, J. Matsunaga, T. Sakurai, T. Ohtani, K. Sawada, H. Nozawa, T. Iizuka, and S. Kohyama, "A 46ns 256Kbit CMOS SRAM," IEEE International Solid-State Circuits Conference, pp.214-215, Feb. 1984 (PDF)

#1984009
T. Sakurai, J. Matsunaga, M. Isobe, T. Ohtani, K. Sawada, A. Aono, H. Nozawa, T. Iizuka, and S. Kohyama, "A Low Power 46 ns 256 kbit CMOS SRAM with Dynamic Double Word Line," IEEE Journal of Solid-State Circuits, Vol.19, No.5, pp.578-585, Oct. 1984 (PDF)

#1984010
K. Sawada, T. Sakurai, T. Ohtani, M. Isobe, and T. Iizuka, "Electron-Beam Tester Evaluation of 256Kbit CMOS Static RAM," Gakujutsu Shinkokai of Japan, pp.35-38, 1984

1983

#1983001
T. Sakurai and K. Tamaru, "Simple Formulas for Two- and Three-Dimensional Capacitances," IEEE Transactions on Electron Devices, Vol.30, No.2, pp.183-185, Feb. 1983 (PDF)

#1983002
T. Sakurai, "Approximation of Wiring Delay in MOSFET LSI," IEEE Journal of Solid-State Circuits, Vol.18, No.4, pp.418-425, Aug. 1983 (PDF)

#1983003
T. Sakurai and T. Iizuka, "Double Word Line and Bit Line Structure for VLSI RAMs -- Reduction of Word Line Delay and Bit Line Delay," International Conference on Solid State Devices and Materials, Tokyo, (A-7-6), pp.269-272, 1983 (PDF)

#1983004
T. Iizuka and T. Sakurai, "CR Isolated Cell for Soft Error Prevention -- Static RAM Application," Symposium on VLSI Technology, Hawaii, pp.70-71, May 1983 (PDF)

1982

#1982001
T. Sakurai, T. Furuyama, and T. Iizuka, "Analysis of Word Line Delay and Its Application," Semiconductor Device & Transistor Research Group of IECE of Japan, SSD82-72, pp.15-22, 1982 (PDF)

1981

#1981001
T. Sakurai, "Electronic Structure of Si-SiO2 System," Ph.D Dissertation, Tokyo Univ., Feb. 1981

1980

#1980001
T. Sakurai and T. Sugano, "Tight-Binding Studies of Si-SIO2 System," Annual Technical Report of Tokyo University, 39, 1979

#1980002
T. Sakurai and T. Sugano, "Studies on Electronic Structures of Crystal Free Surface by Layer Stacking Method," 応用物理学会春季講演会, pp.558, 1980

#1980003
T. Sakurai and T. Sugano, "Theoretical Calculation of Electronic Structures for Crystalline Si and Amorphous SiO2 System," 応用物理学会秋季講演会, 1980

#1980004
T. Sakurai and T. Sugano, "Theoretical Calculation of Electronic Structures for Crystalline Si and Amorphous SiO2 Interface," 電子通信学会電子デバイス研究会, ED80-64, 1980

#1980005
T. Sakurai and T. Sugano, "Gap States of Crystalline Silicon and Amorphous SiO2 System," Conference on Physics of MOS Insulators, North Carolina, June 1980

#1980006
T. Sakurai and T. Sugano, "Theory of Continuously Distributed Trap States at Si-SiO2 Interfaces," Journal of Applied Physics, Vol.52(4), No., pp.2889-1296, Apr. 1981 (PDF)

1979

#1979001
T. Sakurai and H. Yanai, "Numerical Analysis of Merged Semiconductor Devices," Journal of IECE of Japan, J62-C, 1, pp.62, Jan. 1979

#1979002
T. Sakurai and T. Sugano, "Determination of Extended Huckel Parameters for SiO2," 応用物理学会秋季講演会, pp.484, Aug. 1979

1978

#1978001
T. Sakurai, "Numerical Analysis Method for Merged Semiconductor Devices," Master Dissertation, Tokyo Univ., Feb. 1978

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